This is a candidate for the stable branch.
Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=64694
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182084
91177308-0d34-0410-b5e6-
96231b3b80d8
for (unsigned i = 0, e = Ins.size(), ArgIdx = 0; i != e; ++i) {
+ const ISD::InputArg &Arg = Ins[i];
if (Skipped & (1 << i)) {
- InVals.push_back(SDValue());
+ InVals.push_back(DAG.getUNDEF(Arg.VT));
continue;
}
Reg = MF.addLiveIn(Reg, RC);
SDValue Val = DAG.getCopyFromReg(Chain, DL, Reg, VT);
- const ISD::InputArg &Arg = Ins[i];
if (Arg.VT.isVector()) {
// Build a vector from the registers