net: mdio: add clause 73 to ethtool conversion helper

Add a helper to convert a clause 73 advertisement to an ethtool bitmap.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/include/linux/mdio.h b/include/linux/mdio.h
index 27013d6..0670cc6 100644 (file)
--- a/include/linux/mdio.h
+++ b/include/linux/mdio.h
@@ -486,6 +486,45 @@ static inline u32 linkmode_adv_to_mii_10base_t1_t(unsigned long *adv)
        return result;
 }
 
+/**
+ * mii_c73_mod_linkmode - convert a Clause 73 advertisement to linkmodes
+ * @adv: linkmode advertisement setting
+ * @lpa: array of three u16s containing the advertisement
+ *
+ * Convert an IEEE 802.3 Clause 73 advertisement to ethtool link modes.
+ */
+static inline void mii_c73_mod_linkmode(unsigned long *adv, u16 *lpa)
+{
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_Pause_BIT,
+                        adv, lpa[0] & MDIO_AN_C73_0_PAUSE);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
+                        adv, lpa[0] & MDIO_AN_C73_0_ASM_DIR);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_1000BASE_KX);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_10GBASE_KX4);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_40GBASE_KR4);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_40GBASE_CR4);
+       /* 100GBASE_CR10 and 100GBASE_KP4 not implemented */
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_100GBASE_KR4);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_100GBASE_CR4);
+       /* 25GBASE_R_S not implemented */
+       /* The 25GBASE_R bit can be used for 25Gbase KR or CR modes */
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_25GBASE_R);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_25GBASE_R);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
+                        adv, lpa[1] & MDIO_AN_C73_1_10GBASE_KR);
+       linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
+                        adv, lpa[2] & MDIO_AN_C73_2_2500BASE_KX);
+       /* 5GBASE_KR not implemented */
+}
+
 int __mdiobus_read(struct mii_bus *bus, int addr, u32 regnum);
 int __mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val);
 int __mdiobus_modify_changed(struct mii_bus *bus, int addr, u32 regnum,

diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h
index 256b463..b826598 100644 (file)
--- a/include/uapi/linux/mdio.h
+++ b/include/uapi/linux/mdio.h
@@ -231,6 +231,30 @@
 #define MDIO_PMA_EXTABLE_BT1           0x0800  /* BASE-T1 ability */
 #define MDIO_PMA_EXTABLE_NBT           0x4000  /* 2.5/5GBASE-T ability */
 
+/* AN Clause 73 linkword */
+#define MDIO_AN_C73_0_S_MASK           GENMASK(4, 0)
+#define MDIO_AN_C73_0_E_MASK           GENMASK(9, 5)
+#define MDIO_AN_C73_0_PAUSE            BIT(10)
+#define MDIO_AN_C73_0_ASM_DIR          BIT(11)
+#define MDIO_AN_C73_0_C2               BIT(12)
+#define MDIO_AN_C73_0_RF               BIT(13)
+#define MDIO_AN_C73_0_ACK              BIT(14)
+#define MDIO_AN_C73_0_NP               BIT(15)
+#define MDIO_AN_C73_1_T_MASK           GENMASK(4, 0)
+#define MDIO_AN_C73_1_1000BASE_KX      BIT(5)
+#define MDIO_AN_C73_1_10GBASE_KX4      BIT(6)
+#define MDIO_AN_C73_1_10GBASE_KR       BIT(7)
+#define MDIO_AN_C73_1_40GBASE_KR4      BIT(8)
+#define MDIO_AN_C73_1_40GBASE_CR4      BIT(9)
+#define MDIO_AN_C73_1_100GBASE_CR10    BIT(10)
+#define MDIO_AN_C73_1_100GBASE_KP4     BIT(11)
+#define MDIO_AN_C73_1_100GBASE_KR4     BIT(12)
+#define MDIO_AN_C73_1_100GBASE_CR4     BIT(13)
+#define MDIO_AN_C73_1_25GBASE_R_S      BIT(14)
+#define MDIO_AN_C73_1_25GBASE_R                BIT(15)
+#define MDIO_AN_C73_2_2500BASE_KX      BIT(0)
+#define MDIO_AN_C73_2_5GBASE_KR                BIT(1)
+
 /* PHY XGXS lane state register. */
 #define MDIO_PHYXS_LNSTAT_SYNC0                0x0001
 #define MDIO_PHYXS_LNSTAT_SYNC1                0x0002