[VE][NFC] Disable VP tests

VP tests recently added don't work on Release mode.  They work on
Debug mode, so I disable them on Release mode to make tests work.

diff --git a/llvm/test/CodeGen/VE/Vector/vp_add.ll b/llvm/test/CodeGen/VE/Vector/vp_add.ll
index b69a1a1..52808a5 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_add.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_add.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_add [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_and.ll b/llvm/test/CodeGen/VE/Vector/vp_and.ll
index 7507a1a..5f7333f 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_and.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_and.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_and [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_ashr.ll b/llvm/test/CodeGen/VE/Vector/vp_ashr.ll
index c4c1def..cdce387 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_ashr.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_ashr.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_ashr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_lshr.ll b/llvm/test/CodeGen/VE/Vector/vp_lshr.ll
index 79e38e0..e42a3b6 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_lshr.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_lshr.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_lshr [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_mul.ll b/llvm/test/CodeGen/VE/Vector/vp_mul.ll
index 454000e..c7f8c00 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_mul.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_mul.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_mul [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_or.ll b/llvm/test/CodeGen/VE/Vector/vp_or.ll
index 71cef7d..684ac1e 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_or.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_or.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_or [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll b/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll
index 4fa7ae5..2f99c09 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_sdiv.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_sdiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_shl.ll b/llvm/test/CodeGen/VE/Vector/vp_shl.ll
index 84675b6..2cb526b 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_shl.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_shl.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_shl [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_srem.ll b/llvm/test/CodeGen/VE/Vector/vp_srem.ll
index 9527524..b52d5ed 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_srem.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_srem.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_srem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_sub.ll b/llvm/test/CodeGen/VE/Vector/vp_sub.ll
index 575d3dc..5e093b2 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_sub.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_sub.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_sub [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_udiv.ll b/llvm/test/CodeGen/VE/Vector/vp_udiv.ll
index 491b398..e35a41d 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_udiv.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_udiv.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_udiv [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_urem.ll b/llvm/test/CodeGen/VE/Vector/vp_urem.ll
index 340d3b4..9b2b93d 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_urem.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_urem.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_urem [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]] 

diff --git a/llvm/test/CodeGen/VE/Vector/vp_xor.ll b/llvm/test/CodeGen/VE/Vector/vp_xor.ll
index b743abc..dafac65 100644 (file)
--- a/llvm/test/CodeGen/VE/Vector/vp_xor.ll
+++ b/llvm/test/CodeGen/VE/Vector/vp_xor.ll
@@ -1,3 +1,4 @@
+; REQUIRES: asserts
 ; RUN: not --crash llc %s -march=ve -mattr=+vpu -o /dev/null |& FileCheck %s
 
 ; CHECK:  t{{[0-9]+}}: v256i32 = vp_xor [[A:t[0-9]+]], [[B:t[0-9]+]], [[MASK:t[0-9]+]], [[EVL:t[0-9]+]]