unsigned BasePos, OffsetPos;
// Update the base register and adjust the offset.
if (TII->getBaseAndOffsetPosition(*MI, BasePos, OffsetPos)) {
- MI->getOperand(BasePos).setReg(NewBaseReg);
- int64_t Offset = MI->getOperand(OffsetPos).getImm();
- MI->getOperand(OffsetPos).setImm(Offset - It->second.second);
+ MachineInstr *NewMI = MF.CloneMachineInstr(MI);
+ NewMI->getOperand(BasePos).setReg(NewBaseReg);
+ int64_t NewOffset =
+ MI->getOperand(OffsetPos).getImm() - It->second.second;
+ NewMI->getOperand(OffsetPos).setImm(NewOffset);
+ SU->setInstr(NewMI);
+ MISUnitMap[NewMI] = SU;
+ NewMIs.insert(NewMI);
}
}
OverlapReg = 0;
bool HexagonInstrInfo::getIncrementValue(const MachineInstr &MI,
int &Value) const {
if (isPostIncrement(MI)) {
- // For a post-increment, the offset is zero and the increment value is
- // determined by the instruction's access size.
- int Zero;
- unsigned AccessSize;
- bool RetVal = getBaseAndOffset(MI, Zero, AccessSize);
- Value = (int) AccessSize;
- return RetVal;
+ unsigned BasePos = 0, OffsetPos = 0;
+ if (!getBaseAndOffsetPosition(MI, BasePos, OffsetPos))
+ return false;
+ const MachineOperand &OffsetOp = MI.getOperand(OffsetPos);
+ if (OffsetOp.isImm()) {
+ Value = OffsetOp.getImm();
+ return true;
+ }
}
if (MI.getOpcode() == Hexagon::A2_addi) {
Value = MI.getOperand(2).getImm();