/* 3 =====TKIP related===== */
static u32 secmicgetuint32( u8 * p )
-/* Convert from Byte[] to Us4Byte32 in a portable way */
+/* Convert from Byte[] to u32 in a portable way */
{
s32 i;
u32 res = 0;
}
static void secmicputuint32( u8 * p, u32 val )
-/* Convert from Us4Byte32 to Byte[] in a portable way */
+/* Convert from long to Byte[] in a portable way */
{
long i;
_func_enter_;
bool
ODM_RAStateCheck(
PDM_ODM_T pDM_Odm,
- s4Byte RSSI,
+ s32 RSSI,
bool bForceUpdate,
u8 * pRATRState
)
//PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo);
//HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter);
pSWAT_T pDM_SWAT_Table = &pDM_Odm->DM_SWAT_Table;
- s4Byte curRSSI=100, RSSI_A, RSSI_B;
+ s32 curRSSI=100, RSSI_A, RSSI_B;
u8 nextAntenna=Antenna_B;
//static u64 lastTxOkCnt=0, lastRxOkCnt=0;
u64 curTxOkCnt, curRxOkCnt;
// 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer.
// IF other SW team do not support the feature, remove this section.??
//
-s4Byte
+s32
odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Lenovo(
PDM_ODM_T pDM_Odm,
- s4Byte CurrSig
+ s32 CurrSig
)
{
- s4Byte RetSig;
+ s32 RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
//if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
return RetSig;
}
-s4Byte
+s32
odm_SignalScaleMapping_92CSeries_patch_RT_CID_819x_Netcore(
PDM_ODM_T pDM_Odm,
- s4Byte CurrSig
+ s32 CurrSig
)
{
- s4Byte RetSig;
+ s32 RetSig;
#if (DM_ODM_SUPPORT_TYPE == ODM_MP)
//if(pDM_Odm->SupportInterface == ODM_ITRF_USB)
{
}
-s4Byte
+s32
odm_SignalScaleMapping_92CSeries(
PDM_ODM_T pDM_Odm,
- s4Byte CurrSig
+ s32 CurrSig
)
{
- s4Byte RetSig;
+ s32 RetSig;
#if (DEV_BUS_TYPE == RT_PCI_INTERFACE)
if(pDM_Odm->SupportInterface == ODM_ITRF_PCIE)
{
#endif
return RetSig;
}
-s4Byte
+s32
odm_SignalScaleMapping(
PDM_ODM_T pDM_Odm,
- s4Byte CurrSig
+ s32 CurrSig
)
{
if( (pDM_Odm->SupportPlatform == ODM_MP) &&
#if (DM_ODM_SUPPORT_TYPE & (/*ODM_MP|*/ODM_CE|ODM_AP|ODM_ADSL))
//Get Rx snr value in DB
- pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s4Byte)(pPhyStaRpt->path_rxsnr[i]/2);
+ pPhyInfo->RxSNR[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
#endif
/* Record Signal Strength for next packet */
)
{
- s4Byte UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
+ s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
u8 isCCKrate=0;
u8 RSSI_max, RSSI_min, i;
u32 OFDM_pkt=0;
typedef struct _SW_Antenna_Switch_
{
u8 try_flag;
- s4Byte PreRSSI;
+ s32 PreRSSI;
u8 CurAntenna;
u8 PreAntenna;
u8 RSSI_Trying;
bool ANTA_ON; //To indicate Ant A is or not
bool ANTB_ON; //To indicate Ant B is on or not
- s4Byte RSSI_sum_A;
- s4Byte RSSI_sum_B;
- s4Byte RSSI_cnt_A;
- s4Byte RSSI_cnt_B;
+ s32 RSSI_sum_A;
+ s32 RSSI_sum_B;
+ s32 RSSI_cnt_A;
+ s32 RSSI_cnt_B;
u64 lastTxOkCnt;
u64 lastRxOkCnt;
u64 NumQryPhyStatusCCK;
u64 NumQryPhyStatusOFDM;
//Others
- s4Byte RxEVM[MAX_PATH_NUM_92CS];
+ s32 RxEVM[MAX_PATH_NUM_92CS];
}ODM_PHY_DBG_INFO_T;
typedef struct _IQK_MATRIX_REGS_SETTING{
bool bIQKDone;
- s4Byte Value[1][IQK_Matrix_REG_NUM];
+ s32 Value[1][IQK_Matrix_REG_NUM];
}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING;
//for tx power tracking
u32 RegA24; // for TempCCK
- s4Byte RegE94;
- s4Byte RegE9C;
- s4Byte RegEB4;
- s4Byte RegEBC;
+ s32 RegE94;
+ s32 RegE9C;
+ s32 RegEB4;
+ s32 RegEBC;
//u8 bTXPowerTracking;
u8 TXPowercount;
bool
ODM_RAStateCheck(
PDM_ODM_T pDM_Odm,
- s4Byte RSSI,
+ s32 RSSI,
bool bForceUpdate,
u8 * pRATRState
);
u32 length
);
-s4Byte ODM_CompareMemory(
+s32 ODM_CompareMemory(
PDM_ODM_T pDM_Odm,
void * pBuf1,
void * pBuf2,
#define s2Byte s16
#define ps2Byte s16*
- #define s4Byte s32
- #define ps4Byte s32*
-
- #define s8Byte s64
- #define ps8Byte s64*
-
#define DEV_BUS_TYPE RT_USB_INTERFACE
typedef struct timer_list RT_TIMER, *PRT_TIMER;