drm/msm/sde: add secure use case properties

This change adds custom PLANE(fb_translation_mode) and
CRTC(security_level) properties for supporting secure use case.
Plane property identifies the translation requirement for the
planes. CRTC property speicifies what planes could be attached
to this CRTC.

CRs-Fixed: 2053654
Change-Id: Iea59027d4bee536c8554e3955723982a6fc361dd
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>

diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 94f429c..2af1b4d 100644 (file)
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -111,6 +111,7 @@ enum msm_mdp_plane_property {
        PLANE_PROP_ROTATION,
        PLANE_PROP_BLEND_OP,
        PLANE_PROP_SRC_CONFIG,
+       PLANE_PROP_FB_TRANSLATION_MODE,
 
        /* total # of properties */
        PLANE_PROP_COUNT
@@ -129,6 +130,7 @@ enum msm_mdp_crtc_property {
        CRTC_PROP_CORE_CLK,
        CRTC_PROP_CORE_AB,
        CRTC_PROP_CORE_IB,
+       CRTC_PROP_SECURITY_LEVEL,
 
        /* total # of properties */
        CRTC_PROP_COUNT

diff --git a/drivers/gpu/drm/msm/sde/sde_crtc.c b/drivers/gpu/drm/msm/sde/sde_crtc.c
index adfe9e5..fe577b5 100644 (file)
--- a/drivers/gpu/drm/msm/sde/sde_crtc.c
+++ b/drivers/gpu/drm/msm/sde/sde_crtc.c
@@ -1275,6 +1275,10 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc,
        struct drm_device *dev;
        struct sde_kms_info *info;
        struct sde_kms *sde_kms;
+       static const struct drm_prop_enum_list e_secure_level[] = {
+               {SDE_DRM_SEC_NON_SEC, "sec_and_non_sec"},
+               {SDE_DRM_SEC_ONLY, "sec_only"},
+       };
 
        SDE_DEBUG("\n");
 
@@ -1320,6 +1324,12 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc,
 
        msm_property_install_blob(&sde_crtc->property_info, "capabilities",
                DRM_MODE_PROP_IMMUTABLE, CRTC_PROP_INFO);
+
+       msm_property_install_enum(&sde_crtc->property_info, "security_level",
+                       0x0, 0, e_secure_level,
+                       ARRAY_SIZE(e_secure_level),
+                       CRTC_PROP_SECURITY_LEVEL);
+
        sde_kms_info_reset(info);
 
        sde_kms_info_add_keyint(info, "hw_version", catalog->hwversion);

diff --git a/drivers/gpu/drm/msm/sde/sde_plane.c b/drivers/gpu/drm/msm/sde/sde_plane.c
index 114acfd..c75325d 100644 (file)
--- a/drivers/gpu/drm/msm/sde/sde_plane.c
+++ b/drivers/gpu/drm/msm/sde/sde_plane.c
@@ -1592,6 +1592,12 @@ static void _sde_plane_install_properties(struct drm_plane *plane,
        static const struct drm_prop_enum_list e_src_config[] = {
                {SDE_DRM_DEINTERLACE, "deinterlace"}
        };
+       static const struct drm_prop_enum_list e_fb_translation_mode[] = {
+               {SDE_DRM_FB_NON_SEC, "non_sec"},
+               {SDE_DRM_FB_SEC, "sec"},
+               {SDE_DRM_FB_NON_SEC_DIR_TRANS, "non_sec_direct_translation"},
+               {SDE_DRM_FB_SEC_DIR_TRANS, "sec_direct_translation"},
+       };
        const struct sde_format_extended *format_list;
        struct sde_kms_info *info;
        struct sde_plane *psde = to_sde_plane(plane);
@@ -1759,6 +1765,12 @@ static void _sde_plane_install_properties(struct drm_plane *plane,
                msm_property_install_blob(&psde->property_info, feature_name, 0,
                        PLANE_PROP_FOLIAGE_COLOR);
        }
+
+       msm_property_install_enum(&psde->property_info, "fb_translation_mode",
+                       0x0,
+                       0, e_fb_translation_mode,
+                       ARRAY_SIZE(e_fb_translation_mode),
+                       PLANE_PROP_FB_TRANSLATION_MODE);
 }
 
 static inline void _sde_plane_set_csc_v1(struct sde_plane *psde, void *usr_ptr)

diff --git a/include/uapi/drm/sde_drm.h b/include/uapi/drm/sde_drm.h
index c7bed3b..bef8414 100644 (file)
--- a/include/uapi/drm/sde_drm.h
+++ b/include/uapi/drm/sde_drm.h
@@ -65,6 +65,48 @@
 #define SDE_DRM_BITMASK_COUNT       64
 
 /**
+ * Framebuffer modes for "fb_translation_mode" PLANE property
+ *
+ * @SDE_DRM_FB_NON_SEC:          IOMMU configuration for this framebuffer mode
+ *                               is non-secure domain and requires
+ *                               both stage I and stage II translations when
+ *                               this buffer is accessed by the display HW.
+ *                               This is the default mode of all frambuffers.
+ * @SDE_DRM_FB_SEC:              IOMMU configuration for this framebuffer mode
+ *                               is secure domain and requires
+ *                               both stage I and stage II translations when
+ *                               this buffer is accessed by the display HW.
+ * @SDE_DRM_FB_NON_SEC_DIR_TRANS: IOMMU configuration for this framebuffer mode
+ *                               is non-secure domain and requires
+ *                               only stage II translation when
+ *                               this buffer is accessed by the display HW.
+ * @SDE_DRM_FB_SEC_DIR_TRANS:    IOMMU configuration for this framebuffer mode
+ *                               is secure domain and requires
+ *                               only stage II translation when
+ *                               this buffer is accessed by the display HW.
+*/
+
+#define SDE_DRM_FB_NON_SEC              0
+#define SDE_DRM_FB_SEC                  1
+#define SDE_DRM_FB_NON_SEC_DIR_TRANS    2
+#define SDE_DRM_FB_SEC_DIR_TRANS        3
+
+/**
+ * Secure levels for "security_level" CRTC property.
+ *                        CRTC property which specifies what plane types
+ *                        can be attached to this CRTC. Plane component
+ *                        derives the plane type based on the FB_MODE.
+ * @ SDE_DRM_SEC_NON_SEC: Both Secure and non-secure plane types can be
+ *                        attached to this CRTC. This is the default state of
+ *                        the CRTC.
+ * @ SDE_DRM_SEC_ONLY:    Only secure planes can be added to this CRTC. If a
+ *                        CRTC is instructed to be in this mode it follows the
+ *                        platform dependent restrictions.
+ */
+#define SDE_DRM_SEC_NON_SEC            0
+#define SDE_DRM_SEC_ONLY               1
+
+/**
  * struct sde_drm_pix_ext_v1 - version 1 of pixel ext structure
  * @num_ext_pxls_lr: Number of total horizontal pixels
  * @num_ext_pxls_tb: Number of total vertical lines