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drm/i915/adl_s: Add display WAs for ADL-S
authorAditya Swarup <aditya.swarup@intel.com>
Fri, 29 Jan 2021 18:29:44 +0000 (10:29 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Mon, 1 Feb 2021 15:58:24 +0000 (07:58 -0800)
- Extend permanent driver WA Wa_1409767108, Wa_14010685332
  and Wa_14011294188 to adl-s.
- Extend permanent driver WA Wa_1606054188 to adl-s.
- Add Wa_14011765242 for adl-s A0 stepping.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210129182945.217078-8-aditya.swarup@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c
drivers/gpu/drm/i915/display/intel_sprite.c
drivers/gpu/drm/i915/intel_device_info.c

index 2f35a21..139d5ae 100644 (file)
@@ -5339,9 +5339,10 @@ static void tgl_bw_buddy_init(struct drm_i915_private *dev_priv)
        unsigned long abox_mask = INTEL_INFO(dev_priv)->abox_mask;
        int config, i;
 
-       if (IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
+       if (IS_ALDERLAKE_S(dev_priv) ||
+           IS_DG1_REVID(dev_priv, DG1_REVID_A0, DG1_REVID_A0) ||
            IS_TGL_DISP_STEPPING(dev_priv, STEP_A0, STEP_B0))
-               /* Wa_1409767108:tgl,dg1 */
+               /* Wa_1409767108:tgl,dg1,adl-s */
                table = wa_1409767108_buddy_page_masks;
        else
                table = tgl_buddy_page_masks;
@@ -5379,7 +5380,7 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
 
        gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
-       /* Wa_14011294188:ehl,jsl,tgl,rkl */
+       /* Wa_14011294188:ehl,jsl,tgl,rkl,adl-s */
        if (INTEL_PCH_TYPE(dev_priv) >= PCH_JSP &&
            INTEL_PCH_TYPE(dev_priv) < PCH_DG1)
                intel_de_rmw(dev_priv, SOUTH_DSPCLK_GATE_D, 0,
index 5c366dc..89ab21a 100644 (file)
@@ -2372,8 +2372,8 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
                return -EINVAL;
        }
 
-       /* Wa_1606054188:tgl */
-       if (IS_TIGERLAKE(dev_priv) &&
+       /* Wa_1606054188:tgl,adl-s */
+       if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) &&
            plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
            intel_format_is_p01x(fb->format->format)) {
                drm_dbg_kms(&dev_priv->drm,
index 7bdf447..db76d9c 100644 (file)
@@ -250,7 +250,11 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
        struct intel_runtime_info *runtime = RUNTIME_INFO(dev_priv);
        enum pipe pipe;
 
-       if (INTEL_GEN(dev_priv) >= 10) {
+       /* Wa_14011765242: adl-s A0 */
+       if (IS_ADLS_DISP_STEPPING(dev_priv, STEP_A0, STEP_A0))
+               for_each_pipe(dev_priv, pipe)
+                       runtime->num_scalers[pipe] = 0;
+       else if (INTEL_GEN(dev_priv) >= 10) {
                for_each_pipe(dev_priv, pipe)
                        runtime->num_scalers[pipe] = 2;
        } else if (IS_GEN(dev_priv, 9)) {