new design work...

diff --git a/de0_cv_nes/de0_cv_nes.qsf b/de0_cv_nes/de0_cv_nes.qsf
index ac92367..f36f093 100644 (file)
--- a/de0_cv_nes/de0_cv_nes.qsf
+++ b/de0_cv_nes/de0_cv_nes.qsf
@@ -95,6 +95,8 @@ set_location_assignment PIN_AB12 -to nt_v_mirror
 #project files\r
 \r
 set_global_assignment -name VHDL_FILE de0_cv_nes.vhd\r
+set_global_assignment -name VHDL_FILE dummy-mos6502.vhd\r
+\r
 \r
 ##timing definition...\r
 set_global_assignment -name SDC_FILE mos6502-timing.sdc\r

diff --git a/de0_cv_nes/de0_cv_nes.vhd b/de0_cv_nes/de0_cv_nes.vhd
index c5939c0..025218b 100644 (file)
--- a/de0_cv_nes/de0_cv_nes.vhd
+++ b/de0_cv_nes/de0_cv_nes.vhd
@@ -13,34 +13,30 @@ entity de0_cv_nes is
     signal dbg_base_clk: out std_logic;\r
     
 --NES instance
-        base_clk       : in std_logic;
-        rst_n          : in std_logic;
-        joypad1     : in std_logic_vector(7 downto 0);
-        joypad2     : in std_logic_vector(7 downto 0);
-        h_sync_n    : out std_logic;
-        v_sync_n    : out std_logic;
-        r           : out std_logic_vector(3 downto 0);
-        g           : out std_logic_vector(3 downto 0);
-        b           : out std_logic_vector(3 downto 0);
-        nt_v_mirror : in std_logic\r
+        pi_base_clk    : in std_logic;
+        pi_rst_n       : in std_logic;
+        pi_joypad1     : in std_logic_vector(7 downto 0);
+        pi_joypad2     : in std_logic_vector(7 downto 0);
+        po_h_sync_n    : out std_logic;
+        po_v_sync_n    : out std_logic;
+        po_r           : out std_logic_vector(3 downto 0);
+        po_g           : out std_logic_vector(3 downto 0);
+        po_b           : out std_logic_vector(3 downto 0);
+        pi_nt_v_mirror : in std_logic\r
          );
 end de0_cv_nes;
 
 architecture rtl of de0_cv_nes is
     component mos6502
-        generic (   dsize : integer := 8;
-                    asize : integer :=16
-                );
         port (  
-                cpu_clk     : in std_logic; --phi0 input pin.
-                dl_cpu_clk  : in std_logic; --phi1 delayed clock.
-                rdy         : in std_logic;
-                rst_n       : in std_logic;
-                irq_n       : in std_logic;
-                nmi_n       : in std_logic;
-                r_nw        : out std_logic;
-                addr        : out std_logic_vector ( asize - 1 downto 0);
-                d_io        : inout std_logic_vector ( dsize - 1 downto 0)
+                pi_base_clk    : in std_logic;\r
+                pi_rdy         : in std_logic;\r
+                pi_rst_n       : in std_logic;\r
+                pi_irq_n       : in std_logic;\r
+                pi_nmi_n       : in std_logic;\r
+                po_r_nw        : out std_logic;\r
+                po_addr        : out std_logic_vector ( 15 downto 0);\r
+                pio_d_io       : inout std_logic_vector ( 7 downto 0)\r
         );
     end component;
 
@@ -58,9 +54,8 @@ architecture rtl of de0_cv_nes is
     end component;
 
     component address_decoder
-    generic (abus_size : integer := 16; dbus_size : integer := 8);
         port (
-                addr        : in std_logic_vector (abus_size - 1 downto 0);
+                addr        : in std_logic_vector (15 downto 0);
                 rom_ce_n    : out std_logic;
                 ram_ce_n    : out std_logic;
                 ppu_ce_n    : out std_logic;
@@ -68,16 +63,6 @@ architecture rtl of de0_cv_nes is
     );
     end component;
 
-    component tss_ram
-        generic (abus_size : integer := 16; dbus_size : integer := 8);
-        port (  
-                clk               : in std_logic;
-                ce_n, oe_n, we_n  : in std_logic;   --select pin active low.
-                addr              : in std_logic_vector (abus_size - 1 downto 0);
-                d_io              : inout std_logic_vector (dbus_size - 1 downto 0)
-        );
-    end component;
-
     component ram
         generic (abus_size : integer := 16; dbus_size : integer := 8);
         port (  
@@ -88,7 +73,7 @@ architecture rtl of de0_cv_nes is
         );
     end component;
 
-    component prg_rom
+    component rom
         generic (abus_size : integer := 15; dbus_size : integer := 8);
         port (
                 clk             : in std_logic;
@@ -99,35 +84,22 @@ architecture rtl of de0_cv_nes is
     end component;
 
     component ppu port (
-                cpu_clk     : in std_logic;
-                dl_cpu_clk  : in std_logic;
-                ppu_clk     : in std_logic;
-                vga_clk     : in std_logic;
-                emu_ppu_clk : in std_logic;
-                emu_ppu_clk_dl : in std_logic;
+                base_clk    : in std_logic;
                 ce_n        : in std_logic;
                 rst_n       : in std_logic;
                 r_nw        : in std_logic;
                 cpu_addr    : in std_logic_vector (2 downto 0);
                 cpu_d       : inout std_logic_vector (7 downto 0);
 
-                vblank_n    : out std_logic;
                 rd_n        : out std_logic;
                 wr_n        : out std_logic;
                 ale_n       : out std_logic;
                 vram_addr   : out std_logic_vector (13 downto 0);
-                vram_data   : inout std_logic_vector (7 downto 0);
-
-                h_sync_n    : out std_logic;
-                v_sync_n    : out std_logic;
-                r           : out std_logic_vector(3 downto 0);
-                g           : out std_logic_vector(3 downto 0);
-                b           : out std_logic_vector(3 downto 0)
+                vram_data   : inout std_logic_vector (7 downto 0)
     );
     end component;
 
     component v_address_decoder
-    generic (abus_size : integer := 14; dbus_size : integer := 8);
         port (
                 v_addr      : in std_logic_vector (13 downto 0);
                 nt_v_mirror : in std_logic;
@@ -137,16 +109,6 @@ architecture rtl of de0_cv_nes is
             );
     end component;
 
-    component chr_rom
-        generic (abus_size : integer := 13; dbus_size : integer := 8);
-        port (  
-                clk             : in std_logic;
-                ce_n            : in std_logic;     --active low.
-                addr            : in std_logic_vector (abus_size - 1 downto 0);
-                data            : out std_logic_vector (dbus_size - 1 downto 0)\r
-        );
-    end component;
-
     component apu
         port (  clk         : in std_logic;
                 ce_n        : in std_logic;
@@ -160,12 +122,12 @@ architecture rtl of de0_cv_nes is
 \r
 begin
 \r
-    dbg_base_clk <= base_clk;\r
+    dbg_base_clk <= pi_base_clk;\r
 \r
-    h_sync_n    <= '0';\r
-    v_sync_n    <= '0';\r
-    r           <= (others => '0');\r
-    g           <= (others => '0');\r
-    b           <= (others => '0');\r
+    po_h_sync_n    <= '0';\r
+    po_v_sync_n    <= '0';\r
+    po_r           <= (others => '0');\r
+    po_g           <= (others => '0');\r
+    po_b           <= (others => '0');\r
 end rtl;
 

diff --git a/de0_cv_nes/dummy-mos6502.vhd b/de0_cv_nes/dummy-mos6502.vhd
new file mode 100644 (file)
index 0000000..5435b49
--- /dev/null
+++ b/de0_cv_nes/dummy-mos6502.vhd
@@ -0,0 +1,527 @@
+library ieee;\r
+use ieee.std_logic_1164.all;\r
+\r
+entity mos6502 is \r
+    port (  \r
+            pi_base_clk        : in std_logic;\r
+            pi_rdy         : in std_logic;\r
+            pi_rst_n       : in std_logic;\r
+            pi_irq_n       : in std_logic;\r
+            pi_nmi_n       : in std_logic;\r
+            po_r_nw        : out std_logic;\r
+            po_addr        : out std_logic_vector ( 15 downto 0);\r
+            pio_d_io       : inout std_logic_vector ( 7 downto 0)\r
+    );\r
+end mos6502;\r
+\r
+architecture rtl of mos6502 is\r
+\r
+\r
+begin\r
+\r
+    --set ppu value...\r
+    set_ppu_p : process (pi_base_clk, pi_rst_n)\r
+    use ieee.std_logic_arith.conv_std_logic_vector;\r
+\r
+    variable init_step_cnt, plt_step_cnt, \r
+            nt_step_cnt, spr_step_cnt, dma_step_cnt, scl_step_cnt, \r
+            enable_ppu_step_cnt, nmi_step_cnt : integer;\r
+    variable init_done : std_logic;\r
+    variable global_step_cnt : integer;\r
+    constant cpu_io_multi : integer := 3; --io happens every 4 cpu cycle.\r
+    variable i, j : integer;\r
+    variable ch : integer := 16#41# ;\r
+    variable nmi_oam_x : integer range 0 to 255;\r
+    variable nmi_scl_y : integer range 0 to 255;\r
+\r
+    variable ref_cnt : integer range 0 to 120;\r
+\r
+procedure io_out (ad: in integer; dt : in integer) is\r
+begin\r
+    po_r_nw <= '0';\r
+    po_addr <= conv_std_logic_vector(ad, 16);\r
+    pio_d_io <= conv_std_logic_vector(dt, 8);\r
+end;\r
+\r
+procedure io_brk is\r
+begin\r
+    po_addr <= (others => 'Z');\r
+    pio_d_io <= (others => 'Z');\r
+    po_r_nw <= 'Z';\r
+end;\r
+\r
+procedure io_read (ad: in integer) is\r
+begin\r
+    po_r_nw <= '1';\r
+    po_addr <= conv_std_logic_vector(ad, 16);\r
+    pio_d_io <= (others => 'Z');\r
+end;\r
+\r
+    begin\r
+        if (pi_rst_n = '0') then\r
+            \r
+            po_r_nw <= 'Z';\r
+            po_addr <= (others => 'Z');\r
+            pio_d_io <= (others => 'Z');\r
+            \r
+            init_done := '0';\r
+            global_step_cnt := 0;\r
+            init_step_cnt := 0;\r
+            plt_step_cnt := 0;\r
+            nt_step_cnt := 0;\r
+            spr_step_cnt := 0;\r
+            dma_step_cnt := 0;\r
+            scl_step_cnt := 0;\r
+            enable_ppu_step_cnt := 0;\r
+            nmi_step_cnt := 0;\r
+            nmi_oam_x := 0;\r
+            nmi_scl_y := 200;\r
+            ref_cnt := 0;\r
+\r
+        elsif (rising_edge(pi_base_clk)) then\r
+\r
+            if (pi_rdy = '1') then\r
+                if (init_done = '0') then\r
+                    if (global_step_cnt = 0) then\r
+                        --step0.0 = init ppu.\r
+                        if (init_step_cnt = 0 * cpu_io_multi) then\r
+                            --PPUCTRL=01 for test...\r
+                            io_out(16#2000#, 16#01#);\r
+                        elsif (init_step_cnt = 1 * cpu_io_multi) then\r
+                            --PPUMASK=02\r
+                            io_out(16#2001#, 16#02#);\r
+                        elsif (init_step_cnt = 2 * cpu_io_multi) then\r
+                            --PPUCTRL=00\r
+                            io_out(16#2000#, 16#00#);\r
+                        elsif (init_step_cnt = 3 * cpu_io_multi) then\r
+                            --PPUMASK=00\r
+                            io_out(16#2001#, 16#00#);\r
+                        elsif (init_step_cnt = 4 * cpu_io_multi) then\r
+                            --ppuaddr\r
+                            io_out(16#2006#, 16#02#);\r
+                        elsif (init_step_cnt = 5 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#40#);\r
+                        elsif (init_step_cnt = 6 * cpu_io_multi) then\r
+                            --scroll\r
+                            io_out(16#2005#, 16#21#);\r
+                        elsif (init_step_cnt = 7 * cpu_io_multi) then\r
+                            io_out(16#2005#, 16#5#);\r
+                        else\r
+                            io_brk;\r
+                            if (init_step_cnt > 8 * cpu_io_multi) then\r
+                                global_step_cnt := global_step_cnt + 1;\r
+                            end if;\r
+                        end if;\r
+                        init_step_cnt := init_step_cnt + 1;\r
+                    elsif (global_step_cnt = 1) then\r
+                        --step0.1 = palette set.\r
+    --palettes:\r
+    --;;;bg palette\r
+    -- .byte   $0f, $00, $10, $20\r
+    -- .byte   $0f, $04, $14, $24\r
+    -- .byte   $0f, $08, $18, $28\r
+    -- .byte   $0f, $0c, $1c, $2c\r
+    --;;;spr palette\r
+    -- .byte   $0f, $00, $10, $20\r
+    -- .byte   $0f, $06, $16, $26\r
+    -- .byte   $0f, $08, $18, $28\r
+    -- .byte   $0f, $0a, $1a, $2a\r
+                        \r
+                        \r
+                        if (plt_step_cnt = 0 * cpu_io_multi) then\r
+                            --set vram addr 3f00\r
+                            io_out(16#2006#, 16#3f#);\r
+                        elsif (plt_step_cnt = 1 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#00#);\r
+                        \r
+                        elsif (plt_step_cnt = 2 * cpu_io_multi) then\r
+                            --set palette bg data\r
+                            io_out(16#2007#, 16#11#);\r
+                        elsif (plt_step_cnt = 3 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#01#);\r
+                        elsif (plt_step_cnt = 4 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#03#);\r
+                        elsif (plt_step_cnt = 5 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#13#);\r
+\r
+                        elsif (plt_step_cnt = 6 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#0f#);\r
+                        elsif (plt_step_cnt = 7 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#04#);\r
+                        elsif (plt_step_cnt = 8 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#14#);\r
+                        elsif (plt_step_cnt = 9 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#24#);\r
+     \r
+                        elsif (plt_step_cnt = 10 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#0f#);\r
+                        elsif (plt_step_cnt = 11 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#08#);\r
+                        elsif (plt_step_cnt = 12 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#18#);\r
+                        elsif (plt_step_cnt = 13 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#28#);\r
+     \r
+                        elsif (plt_step_cnt = 14 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#05#);\r
+                        elsif (plt_step_cnt = 15 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#0c#);\r
+                        elsif (plt_step_cnt = 16 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#1c#);\r
+                        elsif (plt_step_cnt = 17 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#2c#);\r
+\r
+                         elsif (plt_step_cnt = 18 * cpu_io_multi) then\r
+                            --below is sprite pallete\r
+                            io_out(16#2007#, 16#00#);\r
+                        elsif (plt_step_cnt = 19 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#24#);\r
+                        elsif (plt_step_cnt = 20 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#1b#);\r
+                        elsif (plt_step_cnt = 21 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#11#);\r
+\r
+                        elsif (plt_step_cnt = 22 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#00#);\r
+                        elsif (plt_step_cnt = 23 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#32#);\r
+                        elsif (plt_step_cnt = 24 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#16#);\r
+                        elsif (plt_step_cnt = 25 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#20#);\r
+\r
+                        elsif (plt_step_cnt = 26 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#00#);\r
+                        elsif (plt_step_cnt = 27 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#26#);\r
+                        elsif (plt_step_cnt = 28 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#01#);\r
+                        elsif (plt_step_cnt = 29 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#31#);\r
+\r
+                        else\r
+                            io_brk;\r
+                            if (plt_step_cnt > 30 * cpu_io_multi) then\r
+                                global_step_cnt := global_step_cnt + 1;\r
+                            end if;\r
+                        end if;\r
+                        plt_step_cnt := plt_step_cnt + 1;\r
+                        \r
+                    elsif (global_step_cnt = 2) then\r
+                        --step1 = name table set.\r
+                        if (nt_step_cnt = 0 * cpu_io_multi) then\r
+                            --set vram addr 2005 (first row, 6th col)\r
+                            io_out(16#2006#, 16#20#);\r
+                        elsif (nt_step_cnt = 1 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#03#);\r
+                        elsif (nt_step_cnt = 2 * cpu_io_multi) then\r
+                            --set name tbl data\r
+                            --0x44, 45, 45 = DEE\r
+                            io_out(16#2007#, 16#44#);\r
+                        elsif (nt_step_cnt = 3 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#45#);\r
+                        elsif (nt_step_cnt = 4 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#45#);\r
+\r
+\r
+                        elsif (nt_step_cnt = 5 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#20#);\r
+                        elsif (nt_step_cnt = 6 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#2a#);\r
+                        elsif (nt_step_cnt = 7 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#44#);\r
+\r
+                        elsif (nt_step_cnt = 8 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#24#);\r
+                        elsif (nt_step_cnt = 9 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#43#);\r
+                        elsif (nt_step_cnt = 10 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#6d#);\r
+                        elsif (nt_step_cnt = 11 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#6f#);\r
+                        elsif (nt_step_cnt = 12 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#74#);\r
+                        elsif (nt_step_cnt = 13 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#6f#);\r
+                            \r
+                        elsif (nt_step_cnt = 14 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#2e#);\r
+                        elsif (nt_step_cnt = 15 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#93#);\r
+                        elsif (nt_step_cnt = 16 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#59#);\r
+\r
+                        elsif (nt_step_cnt = 17 * cpu_io_multi) then\r
+                            io_out(16#2007#, 16#00#);\r
+\r
+                        else\r
+                            io_brk;\r
+                            if (nt_step_cnt > 4 * cpu_io_multi) then\r
+                                global_step_cnt := global_step_cnt + 1;\r
+                            end if;\r
+                        end if;\r
+                        \r
+                        nt_step_cnt := nt_step_cnt + 1;\r
+                        \r
+                    elsif (global_step_cnt = 3) then\r
+                        --step2 = sprite set.\r
+                        if (spr_step_cnt = 0) then\r
+                            --set sprite addr=00 (first sprite)\r
+                            io_out(16#2003#, 16#00#);\r
+                        \r
+                        elsif (spr_step_cnt = 1 * cpu_io_multi) then\r
+                            --set sprite data: y=02\r
+                            io_out(16#2004#, 16#05#);\r
+                        elsif (spr_step_cnt = 2 * cpu_io_multi) then\r
+                            --tile=0x4d (ascii 'O')\r
+                            io_out(16#2004#, 16#4f#);\r
+                        elsif (spr_step_cnt = 3 * cpu_io_multi) then\r
+                            --set sprite attr=01 (palette 01)\r
+                            io_out(16#2004#, 16#01#);\r
+                        elsif (spr_step_cnt = 4 * cpu_io_multi) then\r
+                            --set sprite data: x=60\r
+                            io_out(16#2004#, 16#3c#);\r
+\r
+                        elsif (spr_step_cnt = 5 * cpu_io_multi) then\r
+                            --set sprite data: y=50\r
+                            io_out(16#2004#, 1);\r
+                        elsif (spr_step_cnt = 6 * cpu_io_multi) then\r
+                            --tile=0x4f (ascii 'M')\r
+                            io_out(16#2004#, 16#4d#);\r
+                        elsif (spr_step_cnt = 7 * cpu_io_multi) then\r
+                            --set sprite attr=02\r
+                            io_out(16#2004#, 16#02#);\r
+                        elsif (spr_step_cnt = 8 * cpu_io_multi) then\r
+                            --set sprite data: x=100\r
+                            io_out(16#2004#, 16#64#);\r
+\r
+                        elsif (spr_step_cnt = 9 * cpu_io_multi) then\r
+                            --set sprite data: y=60\r
+                            io_out(16#2004#, 60);\r
+                        elsif (spr_step_cnt = 10 * cpu_io_multi) then\r
+                            --tile=0x4d (ascii 'P')\r
+                            io_out(16#2004#, 16#50#);\r
+                        elsif (spr_step_cnt = 11 * cpu_io_multi) then\r
+                            --set sprite attr=01\r
+                            io_out(16#2004#, 16#01#);\r
+                        elsif (spr_step_cnt = 12 * cpu_io_multi) then\r
+                            --set sprite data: x=33\r
+                            io_out(16#2004#, 16#21#);\r
+\r
+                        elsif (spr_step_cnt = 13 * cpu_io_multi) then\r
+                            --set sprite data: y=61\r
+                            io_out(16#2004#, 16#3d#);\r
+                        elsif (spr_step_cnt = 14 * cpu_io_multi) then\r
+                            --tile=0x4d (ascii 'Q')\r
+                            io_out(16#2004#, 16#51#);\r
+                        elsif (spr_step_cnt = 15 * cpu_io_multi) then\r
+                            --set sprite attr=02\r
+                            io_out(16#2004#, 16#02#);\r
+                        elsif (spr_step_cnt = 16 * cpu_io_multi) then\r
+                            --set sprite data: x=45\r
+                            io_out(16#2004#, 45);\r
+\r
+                        else\r
+                            io_brk;\r
+                            if (spr_step_cnt > 8 * cpu_io_multi) then\r
+                                global_step_cnt := global_step_cnt + 2;\r
+                            end if;\r
+                        end if;\r
+                        spr_step_cnt := spr_step_cnt + 1;\r
+\r
+                    elsif (global_step_cnt = 4) then\r
+                        --step3 = dma set.\r
+                        for i in 0 to 64 loop\r
+                            j := i * 4;\r
+                            if (ch = 16#5b#) then\r
+                                ch := 16#41#;\r
+                            else\r
+                                ch := 16#41# + i;\r
+                            end if;\r
+\r
+                            --if (i < 64) then\r
+                            if (i < 10) then\r
+                                --set dma value on the ram.\r
+                                if    (dma_step_cnt = (0 + j) * cpu_io_multi) then\r
+                                    io_out(16#0200# + j, i);\r
+                                elsif (dma_step_cnt = (1 + j) * cpu_io_multi) then\r
+                                    io_out(16#0201# + j, ch);\r
+                                elsif (dma_step_cnt = (2 + j) * cpu_io_multi) then\r
+                                    io_out(16#0202# + j, 16#01#);\r
+                                elsif (dma_step_cnt = (3 + j) * cpu_io_multi) then\r
+                                    io_out(16#0203# + j, j);\r
+                                elsif (dma_step_cnt = (0 + j) * cpu_io_multi + 1) or\r
+                                        (dma_step_cnt = (1 + j) * cpu_io_multi + 1) or\r
+                                        (dma_step_cnt = (2 + j) * cpu_io_multi + 1) or\r
+                                        (dma_step_cnt = (3 + j) * cpu_io_multi + 1) then\r
+                                    io_brk;\r
+                                end if;\r
+                            else\r
+                                if    (dma_step_cnt = (0 + j) * cpu_io_multi) then\r
+                                    --start dma\r
+                                    io_out(16#4014#, 16#02#);\r
+                                elsif (dma_step_cnt = (0 + j) * cpu_io_multi + 1) then\r
+                                    io_brk;\r
+                                elsif (dma_step_cnt = (0 + j) * cpu_io_multi + 2) then\r
+                                    io_brk;\r
+                                    global_step_cnt := global_step_cnt + 1;\r
+                                end if;\r
+                            end if;\r
+                        end loop;\r
+                        \r
+                        dma_step_cnt := dma_step_cnt + 1;\r
+\r
+                    elsif (global_step_cnt = 5) then\r
+                        --step4 = scroll test and ppu reg read test.\r
+                        if (scl_step_cnt = 0) then\r
+                            --x scroll pos=123\r
+                            io_out(16#2005#, 11);\r
+                        elsif (scl_step_cnt = 1 * cpu_io_multi) then\r
+                            --y scroll pos=100\r
+                            io_out(16#2005#, 0);\r
+\r
+                        elsif (scl_step_cnt = 2 * cpu_io_multi) then\r
+                            --read status reg.\r
+                            io_read(16#2002#);\r
+\r
+                        elsif (scl_step_cnt = 3 * cpu_io_multi) then\r
+                            --read vram nt0.\r
+                            io_out(16#2006#, 16#20#);\r
+\r
+                        elsif (scl_step_cnt = 4 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#03#);\r
+\r
+                        elsif (scl_step_cnt = 5 * cpu_io_multi) then\r
+                            io_read(16#2007#);\r
+\r
+                        elsif (scl_step_cnt = 6 * cpu_io_multi) then\r
+                            --pattern tbl.\r
+                            io_out(16#2006#, 16#04#);\r
+\r
+                        elsif (scl_step_cnt = 7 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#d1#);\r
+\r
+                        elsif (scl_step_cnt = 8 * cpu_io_multi) then\r
+                            io_read(16#2007#);\r
+\r
+                        elsif (scl_step_cnt = 9 * cpu_io_multi) then\r
+                            --attr tbl.\r
+                            io_out(16#2006#, 16#23#);\r
+\r
+                        elsif (scl_step_cnt = 10 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#c0#);\r
+\r
+                        elsif (scl_step_cnt = 11 * cpu_io_multi) then\r
+                            --set attr first.\r
+                            io_out(16#2007#, 16#5a#);\r
+\r
+                        elsif (scl_step_cnt = 12 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#23#);\r
+\r
+                        elsif (scl_step_cnt = 13 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#c0#);\r
+\r
+                        elsif (scl_step_cnt = 14 * cpu_io_multi) then\r
+                            io_read(16#2007#);\r
+\r
+                        elsif (scl_step_cnt = 15 * cpu_io_multi) then\r
+                            --read palette tbl.\r
+                            io_out(16#2006#, 16#3f#);\r
+\r
+                        elsif (scl_step_cnt = 16 * cpu_io_multi) then\r
+                            io_out(16#2006#, 16#11#);\r
+\r
+                        elsif (scl_step_cnt = 17 * cpu_io_multi) then\r
+                            io_read(16#2007#);\r
+\r
+                        else\r
+                            io_brk;\r
+                            if (scl_step_cnt > 17 * cpu_io_multi) then\r
+                                global_step_cnt := global_step_cnt + 1;\r
+                            end if;\r
+                        end if;\r
+                        scl_step_cnt := scl_step_cnt + 1;\r
+\r
+                    elsif (global_step_cnt = 6) then\r
+                        --final step = enable ppu.\r
+                        if (enable_ppu_step_cnt = 0 * cpu_io_multi) then\r
+                            --show bg\r
+                            --PPUMASK=1e (show bg and sprite)\r
+                            --PPUMASK=0e (show bg only)\r
+                            io_out(16#2001#, 16#1e#);\r
+                        elsif (enable_ppu_step_cnt = 1 * cpu_io_multi) then\r
+                            --enable nmi\r
+                            --PPUCTRL=80\r
+                            io_out(16#2000#, 16#80#);\r
+                        else\r
+                            io_brk;\r
+                            if (enable_ppu_step_cnt > 1 * cpu_io_multi) then\r
+                                global_step_cnt := global_step_cnt + 1;\r
+                            end if;\r
+                        end if;\r
+                        enable_ppu_step_cnt := enable_ppu_step_cnt + 1;\r
+\r
+                    elsif (global_step_cnt = 7) then\r
+                        ----nmi tests.....\r
+                        if (pi_nmi_n = '0') then\r
+\r
+                            if (nmi_step_cnt = 0 * cpu_io_multi) then\r
+                                --set sprite addr=00 (first sprite)\r
+                                io_out(16#2003#, 16#03#);\r
+                            elsif (nmi_step_cnt = 1 * cpu_io_multi) then\r
+                                --set sprite data: x=100\r
+                                io_out(16#2004#, nmi_oam_x);\r
+                            elsif (nmi_step_cnt = 2 * cpu_io_multi) then\r
+                                --scroll x=0\r
+--                                io_out(16#2005#, nmi_scl_y);\r
+                                io_brk;\r
+                            elsif (nmi_step_cnt = 3 * cpu_io_multi) then\r
+                                --scroll y++\r
+--                                io_out(16#2005#, nmi_scl_y);\r
+                                io_brk;\r
+                            elsif (nmi_step_cnt = 4 * cpu_io_multi) then\r
+                                --set sprite addr=00 (first sprite)\r
+                                io_out(16#2003#, 16#04#);\r
+                            elsif (nmi_step_cnt = 5 * cpu_io_multi) then\r
+                                --set sprite data: x=100\r
+                                io_out(16#2004#, nmi_oam_x);\r
+                            else\r
+                                if (ref_cnt = 0) then\r
+                                    nmi_oam_x := nmi_oam_x + 1;\r
+                                end if;\r
+                                if (nmi_step_cnt mod 10 = 0) then\r
+                                    nmi_scl_y := nmi_scl_y + 1;\r
+                                end if;\r
+                                io_brk;\r
+                                if (nmi_step_cnt > 5 * cpu_io_multi) then\r
+                                    ref_cnt := ref_cnt + 1;\r
+                                    global_step_cnt := global_step_cnt + 1;\r
+                                end if;\r
+                            end if;\r
+                            nmi_step_cnt := nmi_step_cnt + 1;\r
+                        end if;\r
+                    elsif (global_step_cnt = 8) then\r
+                        ----back to nmi tests.....\r
+                        if (pi_nmi_n = '1') then\r
+                            nmi_step_cnt := 0;\r
+                            global_step_cnt := global_step_cnt - 1;\r
+                        end if;\r
+                    else\r
+                        io_brk;\r
+                        init_done := '1';\r
+                    end if;\r
+                end if;--if (init_done = '0') then\r
+            else\r
+                po_r_nw <= 'Z';\r
+                po_addr <= (others => 'Z');\r
+                pio_d_io <= (others => 'Z');\r
+            end if;--if (rdy = '1') then\r
+        end if; --if (rst_n = '0') then\r
+    end process;\r
+\r
+end rtl;\r
+\r
+\r
+\r
+\r
+\r

diff --git a/de0_cv_nes/mos6502-timing.sdc b/de0_cv_nes/mos6502-timing.sdc
index 99896b8..87fa99a 100644 (file)
--- a/de0_cv_nes/mos6502-timing.sdc
+++ b/de0_cv_nes/mos6502-timing.sdc
@@ -1,3 +1,3 @@
-create_clock -name base_clock -period 10 [get_ports {base_clk}]\r
+create_clock -name base_clock -period 20 [get_ports {base_clk}]\r
 #create_generated_clock -name cpu_clock -source [get_ports {base_clk}] -divide_by 24 -invert [get_registers {clock_divider:clock_inst|cpu_clk_wk}]\r
 #create_generated_clock -name emu_ppu_clock -source [get_ports {base_clk}] -divide_by 4 -invert [get_registers {clock_divider:clock_inst|counter_register:cpu_clk_cnt|d_flip_flop:counter_reg_inst|q[1]}]\r