2005-06-15 Dave Brolley <brolley@redhat.com>

        Contribute Morpho ms1 on behalf of Red Hat
        * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
        ms1-opc.h: New files, Morpho ms1 target.

        2004-05-14  Stan Cox  <scox@redhat.com>

        * disassemble.c (ARCH_ms1): Define.
        (disassembler): Handle bfd_arch_ms1

        2004-05-13  Michael Snyder  <msnyder@redhat.com>

        * Makefile.am, Makefile.in: Add ms1 target.
        * configure.in: Ditto.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 94452d8..0d6209a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,19 @@
+2005-06-15  Dave Brolley  <brolley@redhat.com>
+
+       Contribute Morpho ms1 on behalf of Red Hat
+       * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c, 
+       ms1-opc.h: New files, Morpho ms1 target.
+
+       2004-05-14  Stan Cox  <scox@redhat.com>
+
+       * disassemble.c (ARCH_ms1): Define.
+       (disassembler): Handle bfd_arch_ms1
+
+       2004-05-13  Michael Snyder  <msnyder@redhat.com>
+
+       * Makefile.am, Makefile.in: Add ms1 target.
+       * configure.in: Ditto.
+
 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 
        * arm-opc.h: Delete; fold contents into ...

diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index 51f8df7..5218420 100644 (file)
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -34,6 +34,7 @@ HFILES = \
        iq2000-desc.h iq2000-opc.h \
        m32r-desc.h m32r-opc.h \
        mcore-opc.h \
+       ms1-desc.h ms1-opc.h \
        openrisc-desc.h openrisc-opc.h \
        sh-opc.h \
        sh64-opc.h \
@@ -127,6 +128,11 @@ CFILES = \
        m10300-opc.c \
        mmix-dis.c \
        mmix-opc.c \
+       ms1-asm.c \
+       ms1-desc.c \
+       ms1-dis.c \
+       ms1-ibld.c \
+       ms1-opc.c \
        ns32k-dis.c \
        openrisc-asm.c \
        openrisc-desc.c \
@@ -241,6 +247,11 @@ ALL_MACHINES = \
        mips16-opc.lo \
        mmix-dis.lo \
        mmix-opc.lo \
+       ms1-asm.lo \
+       ms1-desc.lo \
+       ms1-dis.lo \
+       ms1-ibld.lo \
+       ms1-opc.lo \
        msp430-dis.lo \
        ns32k-dis.lo \
        openrisc-asm.lo \
@@ -351,7 +362,7 @@ uninstall_libopcodes:
 
 CLEANFILES = \
        stamp-ip2k stamp-m32r stamp-fr30 stamp-frv stamp-openrisc \
-       stamp-iq2000 stamp-xstormy16 \
+       stamp-iq2000 stamp-ms1 stamp-xstormy16 \
        libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
 
 
@@ -367,13 +378,14 @@ CGENDEPS = \
        $(CGENDIR)/opc-opinst.scm \
        cgen-asm.in cgen-dis.in cgen-ibld.in
 
-CGEN_CPUS = fr30 frv ip2k m32r openrisc xstormy16
+CGEN_CPUS = fr30 frv ip2k m32r ms1 openrisc xstormy16
 
 if CGEN_MAINT
 IP2K_DEPS = stamp-ip2k
 M32R_DEPS = stamp-m32r
 FR30_DEPS = stamp-fr30
 FRV_DEPS = stamp-frv
+MS1_DEPS = stamp-ms1
 OPENRISC_DEPS = stamp-openrisc
 IQ2000_DEPS = stamp-iq2000
 XSTORMY16_DEPS = stamp-xstormy16
@@ -382,6 +394,7 @@ IP2K_DEPS =
 M32R_DEPS =
 FR30_DEPS =
 FRV_DEPS =
+MS1_DEPS =
 OPENRISC_DEPS = 
 IQ2000_DEPS = 
 XSTORMY16_DEPS = 
@@ -423,12 +436,16 @@ stamp-fr30: $(CGENDEPS) $(CPUDIR)/fr30.cpu $(CPUDIR)/fr30.opc
 
 $(srcdir)/frv-desc.h $(srcdir)/frv-desc.c $(srcdir)/frv-opc.h $(srcdir)/frv-opc.c $(srcdir)/frv-ibld.c $(srcdir)/frv-asm.c $(srcdir)/frv-dis.c: $(FRV_DEPS)
        @true
-# .cpu and .opc files for frv are kept in a different directory, but cgen has no switch to specify that location, so
-# copy those file to the regular place.
 stamp-frv: $(CGENDEPS) $(srcdir)/../cpu/frv.cpu $(srcdir)/../cpu/frv.opc
        $(MAKE) run-cgen arch=frv prefix=frv options= \
                archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles=
 
+$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MS1_DEPS)
+       @true
+stamp-ms1: $(CGENDEPS) $(CPUDIR)/ms1.cpu $(CPUDIR)/ms1.opc
+       $(MAKE) run-cgen arch=ms1 prefix=ms1 options= \
+               archfile=$(CPUDIR)/ms1.cpu opcfile=$(CPUDIR)/ms1.opc extrafiles=
+
 $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS)
        @true
 stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
@@ -746,6 +763,25 @@ mmix-dis.lo: mmix-dis.c $(INCDIR)/opcode/mmix.h $(INCDIR)/dis-asm.h \
   $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
   opintl.h
 mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode/mmix.h $(INCDIR)/symcat.h
+ms1-asm.lo: ms1-asm.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h ms1-desc.h \
+  $(INCDIR)/opcode/cgen.h ms1-opc.h opintl.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+ms1-desc.lo: ms1-desc.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h ms1-desc.h \
+  $(INCDIR)/opcode/cgen.h ms1-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
+ms1-dis.lo: ms1-dis.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+  $(INCDIR)/libiberty.h ms1-desc.h $(INCDIR)/opcode/cgen.h \
+  ms1-opc.h opintl.h
+ms1-ibld.lo: ms1-ibld.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+  ms1-desc.h $(INCDIR)/opcode/cgen.h ms1-opc.h \
+  opintl.h $(INCDIR)/safe-ctype.h
+ms1-opc.lo: ms1-opc.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h ms1-desc.h \
+  $(INCDIR)/opcode/cgen.h ms1-opc.h $(INCDIR)/libiberty.h
 ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/dis-asm.h \
   $(INCDIR)/opcode/ns32k.h opintl.h

diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index c32eca3..02159ae 100644 (file)
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -255,6 +255,7 @@ HFILES = \
        iq2000-desc.h iq2000-opc.h \
        m32r-desc.h m32r-opc.h \
        mcore-opc.h \
+       ms1-desc.h ms1-opc.h \
        openrisc-desc.h openrisc-opc.h \
        sh-opc.h \
        sh64-opc.h \
@@ -349,6 +350,11 @@ CFILES = \
        m10300-opc.c \
        mmix-dis.c \
        mmix-opc.c \
+       ms1-asm.c \
+       ms1-desc.c \
+       ms1-dis.c \
+       ms1-ibld.c \
+       ms1-opc.c \
        ns32k-dis.c \
        openrisc-asm.c \
        openrisc-desc.c \
@@ -463,6 +469,11 @@ ALL_MACHINES = \
        mips16-opc.lo \
        mmix-dis.lo \
        mmix-opc.lo \
+       ms1-asm.lo \
+       ms1-desc.lo \
+       ms1-dis.lo \
+       ms1-ibld.lo \
+       ms1-opc.lo \
        msp430-dis.lo \
        ns32k-dis.lo \
        openrisc-asm.lo \
@@ -527,7 +538,7 @@ noinst_LIBRARIES = libopcodes.a
 POTFILES = $(HFILES) $(CFILES)
 CLEANFILES = \
        stamp-ip2k stamp-m32r stamp-fr30 stamp-frv stamp-openrisc \
-       stamp-iq2000 stamp-xstormy16 \
+       stamp-iq2000 stamp-ms1 stamp-xstormy16 \
        libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
 
 CGENDIR = @cgendir@
@@ -541,7 +552,7 @@ CGENDEPS = \
        $(CGENDIR)/opc-opinst.scm \
        cgen-asm.in cgen-dis.in cgen-ibld.in
 
-CGEN_CPUS = fr30 frv ip2k m32r openrisc xstormy16
+CGEN_CPUS = fr30 frv ip2k m32r ms1 openrisc xstormy16
 @CGEN_MAINT_FALSE@IP2K_DEPS = 
 @CGEN_MAINT_TRUE@IP2K_DEPS = stamp-ip2k
 @CGEN_MAINT_FALSE@M32R_DEPS = 
@@ -550,6 +561,8 @@ CGEN_CPUS = fr30 frv ip2k m32r openrisc xstormy16
 @CGEN_MAINT_TRUE@FR30_DEPS = stamp-fr30
 @CGEN_MAINT_FALSE@FRV_DEPS = 
 @CGEN_MAINT_TRUE@FRV_DEPS = stamp-frv
+@CGEN_MAINT_FALSE@MS1_DEPS = 
+@CGEN_MAINT_TRUE@MS1_DEPS = stamp-ms1
 @CGEN_MAINT_FALSE@OPENRISC_DEPS = 
 @CGEN_MAINT_TRUE@OPENRISC_DEPS = stamp-openrisc
 @CGEN_MAINT_FALSE@IQ2000_DEPS = 
@@ -953,12 +966,16 @@ stamp-fr30: $(CGENDEPS) $(CPUDIR)/fr30.cpu $(CPUDIR)/fr30.opc
 
 $(srcdir)/frv-desc.h $(srcdir)/frv-desc.c $(srcdir)/frv-opc.h $(srcdir)/frv-opc.c $(srcdir)/frv-ibld.c $(srcdir)/frv-asm.c $(srcdir)/frv-dis.c: $(FRV_DEPS)
        @true
-# .cpu and .opc files for frv are kept in a different directory, but cgen has no switch to specify that location, so
-# copy those file to the regular place.
 stamp-frv: $(CGENDEPS) $(srcdir)/../cpu/frv.cpu $(srcdir)/../cpu/frv.opc
        $(MAKE) run-cgen arch=frv prefix=frv options= \
                archfile=$(srcdir)/../cpu/frv.cpu opcfile=$(srcdir)/../cpu/frv.opc extrafiles=
 
+$(srcdir)/ms1-desc.h $(srcdir)/ms1-desc.c $(srcdir)/ms1-opc.h $(srcdir)/ms1-opc.c $(srcdir)/ms1-ibld.c $(srcdir)/ms1-asm.c $(srcdir)/ms1-dis.c: $(MS1_DEPS)
+       @true
+stamp-ms1: $(CGENDEPS) $(srcdir)/../cpu/ms1.cpu $(srcdir)/../cpu/ms1.opc
+       $(MAKE) run-cgen arch=ms1 prefix=ms1 options= \
+               archfile=$(srcdir)/../cpu/ms1.cpu opcfile=$(srcdir)/../cpu/ms1.opc extrafiles=
+
 $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(srcdir)/openrisc-opc.c $(srcdir)/openrisc-ibld.c $(srcdir)/openrisc-asm.c $(srcdir)/openrisc-dis.c: $(OPENRISC_DEPS)
        @true
 stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
@@ -1276,6 +1293,25 @@ mmix-dis.lo: mmix-dis.c $(INCDIR)/opcode/mmix.h $(INCDIR)/dis-asm.h \
   $(BFD_H) $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
   opintl.h
 mmix-opc.lo: mmix-opc.c $(INCDIR)/opcode/mmix.h $(INCDIR)/symcat.h
+ms1-asm.lo: ms1-asm.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h ms1-desc.h \
+  $(INCDIR)/opcode/cgen.h ms1-opc.h opintl.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+ms1-desc.lo: ms1-desc.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h ms1-desc.h \
+  $(INCDIR)/opcode/cgen.h ms1-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
+ms1-dis.lo: ms1-dis.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+  $(INCDIR)/libiberty.h ms1-desc.h $(INCDIR)/opcode/cgen.h \
+  ms1-opc.h opintl.h
+ms1-ibld.lo: ms1-ibld.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
+  ms1-desc.h $(INCDIR)/opcode/cgen.h ms1-opc.h \
+  opintl.h $(INCDIR)/safe-ctype.h
+ms1-opc.lo: ms1-opc.c sysdep.h config.h \
+  $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h ms1-desc.h \
+  $(INCDIR)/opcode/cgen.h ms1-opc.h $(INCDIR)/libiberty.h
 ns32k-dis.lo: ns32k-dis.c $(BFD_H) $(INCDIR)/ansidecl.h \
   $(INCDIR)/symcat.h sysdep.h config.h $(INCDIR)/dis-asm.h \
   $(INCDIR)/opcode/ns32k.h opintl.h

diff --git a/opcodes/configure b/opcodes/configure
index 7ec3592..161ea78 100755 (executable)
--- a/opcodes/configure
+++ b/opcodes/configure
@@ -8727,6 +8727,7 @@ if test x${all_targets} = xfalse ; then
        bfd_mmix_arch)          ta="$ta mmix-dis.lo mmix-opc.lo" ;;
        bfd_mn10200_arch)       ta="$ta m10200-dis.lo m10200-opc.lo" ;;
        bfd_mn10300_arch)       ta="$ta m10300-dis.lo m10300-opc.lo" ;;
+       bfd_ms1_arch)           ta="$ta ms1-asm.lo ms1-desc.lo ms1-dis.lo ms1-ibld.lo ms1-opc.lo" using_cgen=yes ;;
        bfd_msp430_arch)        ta="$ta msp430-dis.lo" ;;
        bfd_ns32k_arch)         ta="$ta ns32k-dis.lo" ;;
        bfd_openrisc_arch)      ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;

diff --git a/opcodes/configure.in b/opcodes/configure.in
index aff4f34..f437558 100644 (file)
--- a/opcodes/configure.in
+++ b/opcodes/configure.in
@@ -187,6 +187,7 @@ if test x${all_targets} = xfalse ; then
        bfd_mmix_arch)          ta="$ta mmix-dis.lo mmix-opc.lo" ;;
        bfd_mn10200_arch)       ta="$ta m10200-dis.lo m10200-opc.lo" ;;
        bfd_mn10300_arch)       ta="$ta m10300-dis.lo m10300-opc.lo" ;;
+       bfd_ms1_arch)           ta="$ta ms1-asm.lo ms1-desc.lo ms1-dis.lo ms1-ibld.lo ms1-opc.lo" using_cgen=yes ;;
        bfd_msp430_arch)        ta="$ta msp430-dis.lo" ;;
        bfd_ns32k_arch)         ta="$ta ns32k-dis.lo" ;;
        bfd_openrisc_arch)      ta="$ta openrisc-asm.lo openrisc-desc.lo openrisc-dis.lo openrisc-ibld.lo openrisc-opc.lo" using_cgen=yes ;;

diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index 20e5424..0d210e1 100644 (file)
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -51,6 +51,7 @@
 #define ARCH_mmix
 #define ARCH_mn10200
 #define ARCH_mn10300
+#define ARCH_ms1
 #define ARCH_msp430
 #define ARCH_ns32k
 #define ARCH_openrisc
@@ -233,6 +234,11 @@ disassembler (abfd)
       disassemble = print_insn_maxq_little;
       break;
 #endif
+#ifdef ARCH_ms1
+    case bfd_arch_ms1:
+      disassemble = print_insn_ms1;
+      break;
+#endif
 #ifdef ARCH_msp430
     case bfd_arch_msp430:
       disassemble = print_insn_msp430;