DRM_REGISTERS = 1, /**< no caching, no core dump */
DRM_SHM = 2, /**< shared, cached */
DRM_AGP = 3, /**< AGP/GART */
- DRM_SCATTER_GATHER = 4 /**< PCI scatter/gather */
+ DRM_SCATTER_GATHER = 4, /**< PCI scatter/gather */
+ DRM_CONSISTENT = 5 /**< PCI consistent */
} drmMapType;
typedef enum {
}
map->offset += dev->sg->handle;
break;
-
+ case _DRM_CONSISTENT: {
+ /* dma_addr_t is 64bit on i386 with CONFIG_HIGHMEM64G.
+ * As we're limiting the address to 2^32-1 (or less),
+ * casting it down to 32 bits is no problem, but we
+ * need to point to a 64bit variable first. */
+ dma_addr_t bus_addr;
+ map->handle = drm_pci_alloc(dev, map->size, map->size,
+ 0xffffffffUL, &bus_addr);
+ map->offset = (unsigned long)bus_addr;
+ if (!map->handle) {
+ drm_free(map, sizeof(*map), DRM_MEM_MAPS);
+ return -ENOMEM;
+ }
+ break;
+ }
default:
drm_free(map, sizeof(*map), DRM_MEM_MAPS);
return -EINVAL;
case _DRM_AGP:
case _DRM_SCATTER_GATHER:
break;
+ case _DRM_CONSISTENT:
+ drm_pci_free(dev, map->size, map->handle, map->offset);
+ break;
}
drm_free(map, sizeof(*map), DRM_MEM_MAPS);
}
dev->sg = NULL;
}
break;
+ case _DRM_CONSISTENT:
+ drm_pci_free(dev, map->size,
+ map->handle, map->offset);
+ break;
}
drm_free(map, sizeof(*map), DRM_MEM_MAPS);
}
case _DRM_SHM:
case _DRM_AGP:
case _DRM_SCATTER_GATHER:
+ case _DRM_CONSISTENT:
DRM_DEBUG("Extra maplist item\n");
break;
}
* \warning These interfaces aren't stable yet.
*
* \todo Implement the remaining ioctl's for the PCI pools.
- * \todo Add support to map these buffers.
* \todo The wrappers here are so thin that they would be better off inlined..
*
* \author Jose Fonseca <jrfonseca@tungstengraphics.com>
struct list_head *list;
/* Hardcoded from _DRM_FRAME_BUFFER,
- _DRM_REGISTERS, _DRM_SHM, _DRM_AGP, and
- _DRM_SCATTER_GATHER. */
- const char *types[] = { "FB", "REG", "SHM", "AGP", "SG" };
+ _DRM_REGISTERS, _DRM_SHM, _DRM_AGP,
+ _DRM_SCATTER_GATHER, and _DRM_CONSISTENT. */
+ const char *types[] = { "FB", "REG", "SHM", "AGP", "SG", "PCI" };
const char *type;
int i;
map = r_list->map;
if (!map)
continue;
- if (map->type < 0 || map->type > 4)
+ if (map->type < 0 || map->type > 5)
type = "??";
else
type = types[map->type];
case _DRM_AGP:
case _DRM_SCATTER_GATHER:
break;
+ case _DRM_CONSISTENT:
+ drm_pci_free(dev, map->size, map->handle,
+ map->offset);
+ break;
}
drm_free(map, sizeof(*map), DRM_MEM_MAPS);
}
vma->vm_ops = &drm_vm_ops;
break;
case _DRM_SHM:
+ case _DRM_CONSISTENT:
+ /* Consistent memory is really like shared memory. It's only
+ * allocated in a different way. */
vma->vm_ops = &drm_vm_shm_ops;
vma->vm_private_data = (void *)map;
/* Don't let this area swap. Change when
_DRM_REGISTERS = 1, /**< no caching, no core dump */
_DRM_SHM = 2, /**< shared, cached */
_DRM_AGP = 3, /**< AGP/GART */
- _DRM_SCATTER_GATHER = 4 /**< Scatter/gather memory for PCI DMA */
+ _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */
+ _DRM_CONSISTENT = 5 /**< Consistent memory for PCI DMA */
} drm_map_type_t;
/**