nvfx: fix GPU hardlocks when depth buffer is absent

diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h
index 2eec5a1..04447da 100644 (file)
--- a/src/gallium/drivers/nvfx/nvfx_context.h
+++ b/src/gallium/drivers/nvfx/nvfx_context.h
@@ -56,7 +56,7 @@ struct nvfx_rasterizer_state {
 struct nvfx_zsa_state {
        struct pipe_depth_stencil_alpha_state pipe;
        unsigned sb_len;
-       uint32_t sb[26];
+       uint32_t sb[24];
 };
 
 struct nvfx_blend_state {

diff --git a/src/gallium/drivers/nvfx/nvfx_state.c b/src/gallium/drivers/nvfx/nvfx_state.c
index f529fb2..c843164 100644 (file)
--- a/src/gallium/drivers/nvfx/nvfx_state.c
+++ b/src/gallium/drivers/nvfx/nvfx_state.c
@@ -207,10 +207,8 @@ nvfx_depth_stencil_alpha_state_create(struct pipe_context *pipe,
        struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso));
        struct nouveau_statebuf_builder sb = sb_init(zsaso->sb);
 
-       sb_method(sb, NV34TCL_DEPTH_FUNC, 3);
+       sb_method(sb, NV34TCL_DEPTH_FUNC, 1);
        sb_data  (sb, nvgl_comparison_op(cso->depth.func));
-       sb_data  (sb, cso->depth.writemask ? 1 : 0);
-       sb_data  (sb, cso->depth.enabled ? 1 : 0);
 
        sb_method(sb, NV34TCL_ALPHA_FUNC_ENABLE, 3);
        sb_data  (sb, cso->alpha.enabled ? 1 : 0);

diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c
index 7a706ea..1951219 100644 (file)
--- a/src/gallium/drivers/nvfx/nvfx_state_emit.c
+++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c
@@ -113,11 +113,19 @@ nvfx_state_validate_common(struct nvfx_context *nvfx)
    etracer, neverball, foobillard, glest totally misrender
    TODO: find the right fix
 */
-       if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_RAST | NVFX_NEW_ZSA) || (all_swizzled > 0))
+       if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_RAST | NVFX_NEW_ZSA) || (all_swizzled >= 0))
        {
                nvfx_state_viewport_validate(nvfx);
        }
 
+       if(dirty & NVFX_NEW_ZSA || (all_swizzled >= 0))
+       {
+               WAIT_RING(chan, 3);
+               OUT_RING(chan, RING_3D(NV34TCL_DEPTH_WRITE_ENABLE, 2));
+               OUT_RING(chan, nvfx->framebuffer.zsbuf && nvfx->zsa->pipe.depth.writemask);
+               OUT_RING(chan, nvfx->framebuffer.zsbuf && nvfx->zsa->pipe.depth.enabled);
+       }
+
        if(flush_tex_cache)
        {
                // TODO: what about nv30?

diff --git a/src/gallium/drivers/nvfx/nvfx_state_fb.c b/src/gallium/drivers/nvfx/nvfx_state_fb.c
index 28bbd36..3db9cec 100644 (file)
--- a/src/gallium/drivers/nvfx/nvfx_state_fb.c
+++ b/src/gallium/drivers/nvfx/nvfx_state_fb.c
@@ -252,6 +252,10 @@ nvfx_framebuffer_validate(struct nvfx_context *nvfx, unsigned prepare_result)
                        OUT_RING(chan, nvfx->hw_zeta.pitch);
                }
        }
+       else if(nvfx->is_nv4x) {
+               OUT_RING(chan, RING_3D(NV40TCL_ZETA_PITCH, 1));
+               OUT_RING(chan, 64);
+       }
 
        OUT_RING(chan, RING_3D(NV34TCL_RT_ENABLE, 1));
        OUT_RING(chan, rt_enable);