radeonsi: decrease the number of compiler threads

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 2b0f9d3..067efb9 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -970,7 +970,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
 
        if (!util_queue_init(&sscreen->shader_compiler_queue_low_priority,
                             "si_shader_low",
-                            32, num_compiler_threads,
+                            32, num_compiler_threads_lowprio,
                             UTIL_QUEUE_INIT_RESIZE_IF_FULL |
                             UTIL_QUEUE_INIT_USE_MINIMUM_PRIORITY)) {
               si_destroy_shader_cache(sscreen);

diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index c028aba..d25705b 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -113,10 +113,15 @@ struct si_screen {
 
        /* Shader compiler queue for multithreaded compilation. */
        struct util_queue               shader_compiler_queue;
-       LLVMTargetMachineRef            tm[4]; /* used by the queue only */
+       /* Use at most 3 normal compiler threads on quadcore and better.
+        * Hyperthreaded CPUs report the number of threads, but we want
+        * the number of cores. */
+       LLVMTargetMachineRef            tm[3]; /* used by the queue only */
 
        struct util_queue               shader_compiler_queue_low_priority;
-       LLVMTargetMachineRef            tm_low_priority[4];
+       /* Use at most 2 low priority threads on quadcore and better.
+        * We want to minimize the impact on multithreaded Mesa. */
+       LLVMTargetMachineRef            tm_low_priority[2]; /* at most 2 threads */
 };
 
 struct si_blend_color {