radeon/vce: adapt gfx9 surface to vce

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>

diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c
index 0ff66f4..8d25dd7 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -224,9 +224,17 @@ struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc)
 void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot,
                       signed *luma_offset, signed *chroma_offset)
 {
-       unsigned pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128);
-       unsigned vpitch = align(enc->luma->u.legacy.level[0].nblk_y, 16);
-       unsigned fsize = pitch * (vpitch + vpitch / 2);
+       struct r600_common_screen *rscreen = (struct r600_common_screen *)enc->screen;
+       unsigned pitch, vpitch, fsize;
+
+       if (rscreen->chip_class < GFX9) {
+               pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128);
+               vpitch = align(enc->luma->u.legacy.level[0].nblk_y, 16);
+       } else {
+               pitch = align(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe, 256);
+               vpitch = align(enc->luma->u.gfx9.surf_height, 16);
+       }
+       fsize = pitch * (vpitch + vpitch / 2);
 
        *luma_offset = slot->index * fsize;
        *chroma_offset = *luma_offset + pitch * vpitch;
@@ -456,8 +464,14 @@ struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context,
                goto error;
 
        get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf);
-       cpb_size = align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128);
-       cpb_size = cpb_size * align(tmp_surf->u.legacy.level[0].nblk_y, 32);
+
+       cpb_size = (rscreen->chip_class < GFX9) ?
+               align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) *
+               align(tmp_surf->u.legacy.level[0].nblk_y, 32) :
+
+               align(tmp_surf->u.gfx9.surf_pitch * tmp_surf->bpe, 256) *
+               align(tmp_surf->u.gfx9.surf_height, 32);
+
        cpb_size = cpb_size * 3 / 2;
        cpb_size = cpb_size * enc->cpb_num;
        if (enc->dual_pipe)

diff --git a/src/gallium/drivers/radeon/radeon_vce_52.c b/src/gallium/drivers/radeon/radeon_vce_52.c
index 6f9194c..36cf480 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vce_52.c
+++ b/src/gallium/drivers/radeon/radeon_vce_52.c
@@ -167,6 +167,7 @@ void radeon_vce_52_get_param(struct rvce_encoder *enc, struct pipe_h264_enc_pict
 
 static void create(struct rvce_encoder *enc)
 {
+       struct r600_common_screen *rscreen = (struct r600_common_screen *)enc->screen;
        enc->task_info(enc, 0x00000000, 0, 0, 0);
 
        RVCE_BEGIN(0x01000001); // create cmd
@@ -177,9 +178,17 @@ static void create(struct rvce_encoder *enc)
        RVCE_CS(enc->enc_pic.ec.enc_pic_struct_restriction);
        RVCE_CS(enc->base.width); // encImageWidth
        RVCE_CS(enc->base.height); // encImageHeight
-       RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch
-       RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch
-       RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16) / 8); // encRefYHeightInQw
+
+       if (rscreen->chip_class < GFX9) {
+               RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch
+               RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch
+               RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16) / 8); // encRefYHeightInQw
+       } else {
+               RVCE_CS(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe); // encRefPicLumaPitch
+               RVCE_CS(enc->chroma->u.gfx9.surf_pitch * enc->chroma->bpe); // encRefPicChromaPitch
+               RVCE_CS(align(enc->luma->u.gfx9.surf_height, 16) / 8); // encRefYHeightInQw
+       }
+
        RVCE_CS(enc->enc_pic.addrmode_arraymode_disrdo_distwoinstants);
 
        RVCE_CS(enc->enc_pic.ec.enc_pre_encode_context_buffer_offset);
@@ -191,6 +200,7 @@ static void create(struct rvce_encoder *enc)
 
 static void encode(struct rvce_encoder *enc)
 {
+       struct r600_common_screen *rscreen = (struct r600_common_screen *)enc->screen;
        signed luma_offset, chroma_offset, bs_offset;
        unsigned dep, bs_idx = enc->bs_idx++;
        int i;
@@ -239,13 +249,25 @@ static void encode(struct rvce_encoder *enc)
        RVCE_CS(enc->enc_pic.eo.insert_aud);
        RVCE_CS(enc->enc_pic.eo.end_of_sequence);
        RVCE_CS(enc->enc_pic.eo.end_of_stream);
-       RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
-               enc->luma->u.legacy.level[0].offset); // inputPictureLumaAddressHi/Lo
-       RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
-               enc->chroma->u.legacy.level[0].offset); // inputPictureChromaAddressHi/Lo
-       RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
-       RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
-       RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
+
+       if (rscreen->chip_class < GFX9) {
+               RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+                       enc->luma->u.legacy.level[0].offset); // inputPictureLumaAddressHi/Lo
+               RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+                       enc->chroma->u.legacy.level[0].offset); // inputPictureChromaAddressHi/Lo
+               RVCE_CS(align(enc->luma->u.legacy.level[0].nblk_y, 16)); // encInputFrameYPitch
+               RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch
+               RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch
+       } else {
+               RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+                       enc->luma->u.gfx9.surf_offset); // inputPictureLumaAddressHi/Lo
+               RVCE_READ(enc->handle, RADEON_DOMAIN_VRAM,
+                       enc->chroma->u.gfx9.surf_offset); // inputPictureChromaAddressHi/Lo
+               RVCE_CS(align(enc->luma->u.gfx9.surf_height, 16)); // encInputFrameYPitch
+               RVCE_CS(enc->luma->u.gfx9.surf_pitch * enc->luma->bpe); // encInputPicLumaPitch
+               RVCE_CS(enc->chroma->u.gfx9.surf_pitch * enc->chroma->bpe); // encInputPicChromaPitch
+       }
+
        if (enc->dual_pipe)
                enc->enc_pic.eo.enc_input_pic_addr_array_disable2pipe_disablemboffload = 0x00000000;
        else