class RegScavenger {
MachineBasicBlock *MBB;
MachineBasicBlock::iterator MBBI;
+ bool MBBIInited;
unsigned NumPhysRegs;
/// RegStates - The current state of all the physical registers immediately
void forward();
void backward();
+ /// forward / backward - Move the internal MBB iterator and update register
+ /// states until it has reached but not processed the specific iterator.
+ void forward(MachineBasicBlock::iterator I);
+ void backward(MachineBasicBlock::iterator I);
+
/// isReserved - Returns true if a register is reserved. It is never "unused".
bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/ADT/STLExtras.h"
using namespace llvm;
RegScavenger::RegScavenger(MachineBasicBlock *mbb)
- : MBB(mbb), MBBI(mbb->begin()) {
+ : MBB(mbb), MBBIInited(false) {
const MachineFunction &MF = *MBB->getParent();
const TargetMachine &TM = MF.getTarget();
const MRegisterInfo *RegInfo = TM.getRegisterInfo();
}
void RegScavenger::forward() {
+ assert(MBBI != MBB->end() && "Already at the end of the basic block!");
+ // Move ptr forward.
+ if (!MBBIInited) {
+ MBBI = MBB->begin();
+ MBBIInited = true;
+ } else
+ MBBI = next(MBBI);
+
MachineInstr *MI = MBBI;
// Process uses first.
BitVector ChangedRegs(NumPhysRegs);
if (!MO.isDead())
setUsed(Reg);
}
-
- ++MBBI;
}
void RegScavenger::backward() {
- MachineInstr *MI = --MBBI;
+ assert(MBBI != MBB->begin() && "Already at start of basic block!");
+ // Move ptr backward.
+ MBBI = prior(MBBI);
+
+ MachineInstr *MI = MBBI;
// Process defs first.
const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
setUsed(ChangedRegs);
}
+void RegScavenger::forward(MachineBasicBlock::iterator I) {
+ while (MBBI != I)
+ forward();
+}
+
+void RegScavenger::backward(MachineBasicBlock::iterator I) {
+ while (MBBI != I)
+ backward();
+}
+
/// CreateRegClassMask - Set the bits that represent the registers in the
/// TargetRegisterClass.
static void CreateRegClassMask(const TargetRegisterClass *RC, BitVector &Mask) {