2005-07-21 Paul Brook <paul@codesourcery.com>

gas/
	* config/tc-arm.c (encode_thumb32_addr_mode): Don't set
	inst.reloc.pc_rel.
gas/testsuite/
	* gas/arm/thumb32.s: Add tests for [pc, #imm] addressing modes.
	* gas/arm/thumb32.d: Ditto.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index a81af53..453ae6f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2005-07-21  Paul Brook  <paul@codesourcery.com>
+
+       * config/tc-arm.c (encode_thumb32_addr_mode): Don't set
+       inst.reloc.pc_rel.
+
 2005-07-20  Tavis Ormandy <taviso@gentoo.org>
 
        * messages.c: Use vsnprintf instead of vsprintf.

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index dfdf7b5..0c9911f 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -5667,7 +5667,6 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
            inst.instruction |= 0x00000100;
        }
       inst.reloc.type = BFD_RELOC_ARM_T32_OFFSET_IMM;
-      inst.reloc.pc_rel = is_pc;
     }
   else if (inst.operands[i].postind)
     {

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index c8176e4..a4f02c7 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2005-07-21  Paul Brook  <paul@codesourcery.com>
+
+       * gas/arm/thumb32.s: Add tests for [pc, #imm] addressing modes.
+       * gas/arm/thumb32.d: Ditto.
+
 2005-07-20  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 
        * gas/m32r/rel32.exp: New file. 

diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d
index eec0162..a74253e 100644 (file)
--- a/gas/testsuite/gas/arm/thumb32.d
+++ b/gas/testsuite/gas/arm/thumb32.d
@@ -991,3 +991,23 @@ Disassembly of section .text:
 0+ca4 <[^>]+> fa52 f183        uxtab   r1, r2, r3
 0+ca8 <[^>]+> fa32 f183        uxtab16 r1, r2, r3
 0+cac <[^>]+> fa12 f183        uxtah   r1, r2, r3
+0+cb0 <[^>]+> f89f 12aa        ldrb\.w r1, \[pc, #682\]        ; 0+f5e <[^>]+>
+0+cb4 <[^>]+> f89f 1155        ldrb\.w r1, \[pc, #341\]        ; 0+e0d <[^>]+>
+0+cb8 <[^>]+> f81f 12aa        ldrb\.w r1, \[pc, #-682\]       ; 0+a12 <[^>]+>
+0+cbc <[^>]+> f81f 1155        ldrb\.w r1, \[pc, #-341\]       ; 0+b6b <[^>]+>
+0+cc0 <[^>]+> f99f 12aa        ldrsb\.w        r1, \[pc, #682\]        ; 0+f6e <[^>]+>
+0+cc4 <[^>]+> f99f 1155        ldrsb\.w        r1, \[pc, #341\]        ; 0+e1d <[^>]+>
+0+cc8 <[^>]+> f91f 12aa        ldrsb\.w        r1, \[pc, #-682\]       ; 0+a22 <[^>]+>
+0+ccc <[^>]+> f91f 1155        ldrsb\.w        r1, \[pc, #-341\]       ; 0+b7b <[^>]+>
+0+cd0 <[^>]+> f8bf 12aa        ldrh\.w r1, \[pc, #682\]        ; 0+f7e <[^>]+>
+0+cd4 <[^>]+> f8bf 1155        ldrh\.w r1, \[pc, #341\]        ; 0+e2d <[^>]+>
+0+cd8 <[^>]+> f83f 12aa        ldrh\.w r1, \[pc, #-682\]       ; 0+a32 <[^>]+>
+0+cdc <[^>]+> f83f 1155        ldrh\.w r1, \[pc, #-341\]       ; 0+b8b <[^>]+>
+0+ce0 <[^>]+> f9bf 12aa        ldrsh\.w        r1, \[pc, #682\]        ; 0+f8e <[^>]+>
+0+ce4 <[^>]+> f9bf 1155        ldrsh\.w        r1, \[pc, #341\]        ; 0+e3d <[^>]+>
+0+ce8 <[^>]+> f93f 12aa        ldrsh\.w        r1, \[pc, #-682\]       ; 0+a42 <[^>]+>
+0+cec <[^>]+> f93f 1155        ldrsh\.w        r1, \[pc, #-341\]       ; 0+b9b <[^>]+>
+0+cf0 <[^>]+> f8df 12aa        ldr\.w  r1, \[pc, #682\]        ; 0+f9e <[^>]+>
+0+cf4 <[^>]+> f8df 1155        ldr\.w  r1, \[pc, #341\]        ; 0+e4d <[^>]+>
+0+cf8 <[^>]+> f85f 12aa        ldr\.w  r1, \[pc, #-682\]       ; 0+a52 <[^>]+>
+0+cfc <[^>]+> f85f 1155        ldr\.w  r1, \[pc, #-341\]       ; 0+bab <[^>]+>

diff --git a/gas/testsuite/gas/arm/thumb32.s b/gas/testsuite/gas/arm/thumb32.s
index 7db255a..4baf4ff 100644 (file)
--- a/gas/testsuite/gas/arm/thumb32.s
+++ b/gas/testsuite/gas/arm/thumb32.s
@@ -733,3 +733,15 @@ xta:
        uxtab   r1, r2, r3
        uxtab16 r1, r2, r3
        uxtah   r1, r2, r3
+
+       .macro  ldpcimm op
+       \op     r1, [pc, #0x2aa]
+       \op     r1, [pc, #0x155]
+       \op     r1, [pc, #-0x2aa]
+       \op     r1, [pc, #-0x155]
+       .endm
+       ldpcimm ldrb
+       ldpcimm ldrsb
+       ldpcimm ldrh
+       ldpcimm ldrsh
+       ldpcimm ldr