amd-xgbe: Set the MII control width for the MAC interface

When running in SGMII mode at speeds below 1000Mbps, the auto-negotition
control register must set the MII control width for the MAC interface
to be 8-bits wide.  By default the width is 4-bits.

Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
index 9795419..d07edf9 100644 (file)
--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h
@@ -1339,6 +1339,7 @@
 #define XGBE_AN_CL37_PCS_MODE_BASEX    0x00
 #define XGBE_AN_CL37_PCS_MODE_SGMII    0x04
 #define XGBE_AN_CL37_TX_CONFIG_MASK    0x08
+#define XGBE_AN_CL37_MII_CTRL_8BIT     0x0100
 
 /* Bit setting and getting macros
  *  The get macro will extract the current bit field value from within

diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
index 8068491..2222bbf 100644 (file)
--- a/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-mdio.c
@@ -982,6 +982,8 @@ static void xgbe_an37_init(struct xgbe_prv_data *pdata)
                break;
        }
 
+       reg |= XGBE_AN_CL37_MII_CTRL_8BIT;
+
        XMDIO_WRITE(pdata, MDIO_MMD_VEND2, MDIO_VEND2_AN_CTRL, reg);
 
        netif_dbg(pdata, link, pdata->netdev, "CL37 AN (%s) initialized\n",