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ARM: at91: move sdramc/ddrsdr header to include/soc/at91
authorAlexandre Belloni <alexandre.belloni@free-electrons.com>
Fri, 7 Nov 2014 20:58:21 +0000 (21:58 +0100)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Thu, 13 Nov 2014 11:03:44 +0000 (12:03 +0100)
Move the (DDR) SDRAM controller headers to include/soc/at91 to remove the
dependency on mach/ headers from the at91-reset driver.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
MAINTAINERS
arch/arm/mach-at91/include/mach/at91_ramc.h
arch/arm/mach-at91/pm.h
drivers/power/reset/at91-reset.c
include/soc/at91/at91rm9200_sdramc.h [moved from arch/arm/mach-at91/include/mach/at91rm9200_sdramc.h with 100% similarity]
include/soc/at91/at91sam9_ddrsdr.h [moved from arch/arm/mach-at91/include/mach/at91sam9_ddrsdr.h with 100% similarity]
include/soc/at91/at91sam9_sdramc.h [moved from arch/arm/mach-at91/include/mach/at91sam9_sdramc.h with 100% similarity]

index dab92a7..9b604e7 100644 (file)
@@ -861,6 +861,7 @@ W:  http://maxim.org.za/at91_26.html
 W:     http://www.linux4sam.org
 S:     Supported
 F:     arch/arm/mach-at91/
+F:     include/soc/at91/
 F:     arch/arm/boot/dts/at91*.dts
 F:     arch/arm/boot/dts/at91*.dtsi
 F:     arch/arm/boot/dts/sama*.dts
index d8aeb27..e4492b1 100644 (file)
@@ -25,8 +25,8 @@ extern void __iomem *at91_ramc_base[];
 #define AT91_MEMCTRL_SDRAMC    1
 #define AT91_MEMCTRL_DDRSDR    2
 
-#include <mach/at91rm9200_sdramc.h>
-#include <mach/at91sam9_ddrsdr.h>
-#include <mach/at91sam9_sdramc.h>
+#include <soc/at91/at91rm9200_sdramc.h>
+#include <soc/at91/at91sam9_ddrsdr.h>
+#include <soc/at91/at91sam9_sdramc.h>
 
 #endif /* __AT91_RAMC_H__ */
index c5101dc..d2c8996 100644 (file)
@@ -14,7 +14,6 @@
 #include <asm/proc-fns.h>
 
 #include <mach/at91_ramc.h>
-#include <mach/at91rm9200_sdramc.h>
 
 #ifdef CONFIG_PM
 extern void at91_pm_set_standby(void (*at91_standby)(void));
index 3cb3669..69a75d9 100644 (file)
@@ -19,8 +19,8 @@
 
 #include <asm/system_misc.h>
 
-#include <mach/at91sam9_ddrsdr.h>
-#include <mach/at91sam9_sdramc.h>
+#include <soc/at91/at91sam9_ddrsdr.h>
+#include <soc/at91/at91sam9_sdramc.h>
 
 #define AT91_RSTC_CR   0x00            /* Reset Controller Control Register */
 #define AT91_RSTC_PROCRST      BIT(0)          /* Processor Reset */