static void igb_commit_icr(IGBCore *core)
{
/*
- * If GPIE.NSICR = 0, then the copy of IAM to IMS will occur only if at
+ * If GPIE.NSICR = 0, then the clear of IMS will occur only if at
* least one bit is set in the IMS and there is a true interrupt as
* reflected in ICR.INTA.
*/
if ((core->mac[GPIE] & E1000_GPIE_NSICR) ||
(core->mac[IMS] && (core->mac[ICR] & E1000_ICR_INT_ASSERTED))) {
- igb_set_ims(core, IMS, core->mac[IAM]);
- } else {
- igb_update_interrupt_state(core);
+ igb_clear_ims_bits(core, core->mac[IAM]);
}
+
+ igb_update_interrupt_state(core);
}
static void igb_set_icr(IGBCore *core, int index, uint32_t val)