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drm/amd/display: Remove byte swapping for dmcub abm config table
authorWyatt Wood <wyatt.wood@amd.com>
Mon, 30 Mar 2020 13:58:29 +0000 (09:58 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 22 Apr 2020 22:11:47 +0000 (18:11 -0400)
[Why]
Since x86 and dmcub are both little endian, byte swapping isn't
necessary. Dmcu requires byte swapping as it is big endian.

[How]
Add flag to function definitions to determine if byte swapping is
necessary.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/modules/power/power_helpers.c

index dd15176..edb4464 100644 (file)
@@ -240,7 +240,7 @@ static void fill_backlight_transform_table(struct dmcu_iram_parameters params,
 }
 
 static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters params,
-               struct iram_table_v_2_2 *table)
+               struct iram_table_v_2_2 *table, bool big_endian)
 {
        unsigned int i;
        unsigned int num_entries = NUM_BL_CURVE_SEGS;
@@ -264,10 +264,10 @@ static void fill_backlight_transform_table_v_2_2(struct dmcu_iram_parameters par
                lut_index = (params.backlight_lut_array_size - 1) * i / (num_entries - 1);
                ASSERT(lut_index < params.backlight_lut_array_size);
 
-               table->backlight_thresholds[i] =
-                       cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries));
-               table->backlight_offsets[i] =
-                       cpu_to_be16(params.backlight_lut_array[lut_index]);
+               table->backlight_thresholds[i] = (big_endian) ?
+                       cpu_to_be16(DIV_ROUNDUP((i * 65536), num_entries)) : DIV_ROUNDUP((i * 65536), num_entries);
+               table->backlight_offsets[i] = (big_endian) ?
+                       cpu_to_be16(params.backlight_lut_array[lut_index]) : params.backlight_lut_array[lut_index];
        }
 }
 
@@ -587,18 +587,16 @@ void fill_iram_v_2_2(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parame
        ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
 
        fill_backlight_transform_table_v_2_2(
-                       params, ram_table);
+                       params, ram_table, true);
 }
 
-void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params)
+void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parameters params, bool big_endian)
 {
        unsigned int i, j;
        unsigned int set = params.set;
 
        ram_table->flags = 0x0;
-
-       ram_table->min_abm_backlight =
-                       cpu_to_be16(params.min_abm_backlight);
+       ram_table->min_abm_backlight = (big_endian) ? cpu_to_be16(params.min_abm_backlight) : params.min_abm_backlight;
 
        for (i = 0; i < NUM_AGGR_LEVEL; i++) {
                ram_table->hybrid_factor[i] = abm_settings[set][i].brightness_gain;
@@ -622,33 +620,33 @@ void fill_iram_v_2_3(struct iram_table_v_2_2 *ram_table, struct dmcu_iram_parame
        ram_table->iir_curve[4] = 0x65;
 
        //Gamma 2.2
-       ram_table->crgb_thresh[0] = cpu_to_be16(0x127c);
-       ram_table->crgb_thresh[1] = cpu_to_be16(0x151b);
-       ram_table->crgb_thresh[2] = cpu_to_be16(0x17d5);
-       ram_table->crgb_thresh[3] = cpu_to_be16(0x1a56);
-       ram_table->crgb_thresh[4] = cpu_to_be16(0x1c83);
-       ram_table->crgb_thresh[5] = cpu_to_be16(0x1e72);
-       ram_table->crgb_thresh[6] = cpu_to_be16(0x20f0);
-       ram_table->crgb_thresh[7] = cpu_to_be16(0x232b);
-       ram_table->crgb_offset[0] = cpu_to_be16(0x2999);
-       ram_table->crgb_offset[1] = cpu_to_be16(0x3999);
-       ram_table->crgb_offset[2] = cpu_to_be16(0x4666);
-       ram_table->crgb_offset[3] = cpu_to_be16(0x5999);
-       ram_table->crgb_offset[4] = cpu_to_be16(0x6333);
-       ram_table->crgb_offset[5] = cpu_to_be16(0x7800);
-       ram_table->crgb_offset[6] = cpu_to_be16(0x8c00);
-       ram_table->crgb_offset[7] = cpu_to_be16(0xa000);
-       ram_table->crgb_slope[0]  = cpu_to_be16(0x3609);
-       ram_table->crgb_slope[1]  = cpu_to_be16(0x2dfa);
-       ram_table->crgb_slope[2]  = cpu_to_be16(0x27ea);
-       ram_table->crgb_slope[3]  = cpu_to_be16(0x235d);
-       ram_table->crgb_slope[4]  = cpu_to_be16(0x2042);
-       ram_table->crgb_slope[5]  = cpu_to_be16(0x1dc3);
-       ram_table->crgb_slope[6]  = cpu_to_be16(0x1b1a);
-       ram_table->crgb_slope[7]  = cpu_to_be16(0x1910);
+       ram_table->crgb_thresh[0] = (big_endian) ? cpu_to_be16(0x127c) : 0x127c;
+       ram_table->crgb_thresh[1] = (big_endian) ? cpu_to_be16(0x151b) : 0x151b;
+       ram_table->crgb_thresh[2] = (big_endian) ? cpu_to_be16(0x17d5) : 0x17d5;
+       ram_table->crgb_thresh[3] = (big_endian) ? cpu_to_be16(0x1a56) : 0x1a56;
+       ram_table->crgb_thresh[4] = (big_endian) ? cpu_to_be16(0x1c83) : 0x1c83;
+       ram_table->crgb_thresh[5] = (big_endian) ? cpu_to_be16(0x1e72) : 0x1e72;
+       ram_table->crgb_thresh[6] = (big_endian) ? cpu_to_be16(0x20f0) : 0x20f0;
+       ram_table->crgb_thresh[7] = (big_endian) ? cpu_to_be16(0x232b) : 0x232b;
+       ram_table->crgb_offset[0] = (big_endian) ? cpu_to_be16(0x2999) : 0x2999;
+       ram_table->crgb_offset[1] = (big_endian) ? cpu_to_be16(0x3999) : 0x3999;
+       ram_table->crgb_offset[2] = (big_endian) ? cpu_to_be16(0x4666) : 0x4666;
+       ram_table->crgb_offset[3] = (big_endian) ? cpu_to_be16(0x5999) : 0x5999;
+       ram_table->crgb_offset[4] = (big_endian) ? cpu_to_be16(0x6333) : 0x6333;
+       ram_table->crgb_offset[5] = (big_endian) ? cpu_to_be16(0x7800) : 0x7800;
+       ram_table->crgb_offset[6] = (big_endian) ? cpu_to_be16(0x8c00) : 0x8c00;
+       ram_table->crgb_offset[7] = (big_endian) ? cpu_to_be16(0xa000) : 0xa000;
+       ram_table->crgb_slope[0]  = (big_endian) ? cpu_to_be16(0x3609) : 0x3609;
+       ram_table->crgb_slope[1]  = (big_endian) ? cpu_to_be16(0x2dfa) : 0x2dfa;
+       ram_table->crgb_slope[2]  = (big_endian) ? cpu_to_be16(0x27ea) : 0x27ea;
+       ram_table->crgb_slope[3]  = (big_endian) ? cpu_to_be16(0x235d) : 0x235d;
+       ram_table->crgb_slope[4]  = (big_endian) ? cpu_to_be16(0x2042) : 0x2042;
+       ram_table->crgb_slope[5]  = (big_endian) ? cpu_to_be16(0x1dc3) : 0x1dc3;
+       ram_table->crgb_slope[6]  = (big_endian) ? cpu_to_be16(0x1b1a) : 0x1b1a;
+       ram_table->crgb_slope[7]  = (big_endian) ? cpu_to_be16(0x1910) : 0x1910;
 
        fill_backlight_transform_table_v_2_2(
-                       params, ram_table);
+                       params, ram_table, big_endian);
 }
 
 bool dmub_init_abm_config(struct abm *abm,
@@ -662,7 +660,7 @@ bool dmub_init_abm_config(struct abm *abm,
 
        memset(&ram_table, 0, sizeof(ram_table));
 
-       fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params);
+       fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, false);
        result = abm->funcs->init_abm_config(
                abm, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
 
@@ -684,11 +682,11 @@ bool dmcu_load_iram(struct dmcu *dmcu,
        memset(&ram_table, 0, sizeof(ram_table));
 
        if (dmcu->dmcu_version.abm_version == 0x24) {
-               fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params);
+               fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);
                        result = dmcu->funcs->load_iram(
                                        dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);
        } else if (dmcu->dmcu_version.abm_version == 0x23) {
-               fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params);
+               fill_iram_v_2_3((struct iram_table_v_2_2 *)ram_table, params, true);
 
                result = dmcu->funcs->load_iram(
                                dmcu, 0, (char *)(&ram_table), IRAM_RESERVE_AREA_START_V2_2);