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drm/amdgpu: add gmc cg support for dimgrey_cavefish
authorTao Zhou <tao.zhou1@amd.com>
Thu, 23 Jul 2020 10:10:20 +0000 (18:10 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 12 Oct 2020 18:00:57 +0000 (14:00 -0400)
The athub version for dimgrey_cavefish is v2.1.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

index 7710862..f7a8417 100644 (file)
@@ -1107,8 +1107,8 @@ static int gmc_v10_0_set_clockgating_state(void *handle,
        if (r)
                return r;
 
-       if (adev->asic_type == CHIP_SIENNA_CICHLID ||
-           adev->asic_type == CHIP_NAVY_FLOUNDER)
+       if (adev->asic_type >= CHIP_SIENNA_CICHLID &&
+           adev->asic_type <= CHIP_DIMGREY_CAVEFISH)
                return athub_v2_1_set_clockgating(adev, state);
        else
                return athub_v2_0_set_clockgating(adev, state);
@@ -1120,8 +1120,8 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags)
 
        adev->mmhub.funcs->get_clockgating(adev, flags);
 
-       if (adev->asic_type == CHIP_SIENNA_CICHLID ||
-           adev->asic_type == CHIP_NAVY_FLOUNDER)
+       if (adev->asic_type >= CHIP_SIENNA_CICHLID &&
+           adev->asic_type <= CHIP_DIMGREY_CAVEFISH)
                athub_v2_1_get_clockgating(adev, flags);
        else
                athub_v2_0_get_clockgating(adev, flags);
index e590c60..4ac8ac0 100644 (file)
@@ -639,6 +639,7 @@ static int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
        case CHIP_NAVI12:
        case CHIP_SIENNA_CICHLID:
        case CHIP_NAVY_FLOUNDER:
+       case CHIP_DIMGREY_CAVEFISH:
                mmhub_v2_0_update_medium_grain_clock_gating(adev,
                                state == AMD_CG_STATE_GATE);
                mmhub_v2_0_update_medium_grain_light_sleep(adev,