--- /dev/null
+.setcpu "6502"\r
+.autoimport on\r
+\r
+; iNES header\r
+.segment "HEADER"\r
+ .byte $4E, $45, $53, $1A ; "NES" Header\r
+ .byte $02 ; PRG-BANKS\r
+ .byte $01 ; CHR-BANKS\r
+ .byte $01 ; Vetrical Mirror\r
+ .byte $00 ; \r
+ .byte $00, $00, $00, $00 ; \r
+ .byte $00, $00, $00, $00 ; \r
+\r
+.segment "STARTUP"\r
+.proc Reset\r
+; interrupt off, initialize sp.\r
+ sei\r
+ ldx #$ff\r
+ txs\r
+\r
+ ;ppu register initialize.\r
+ lda #$00\r
+ sta $2000\r
+ sta $2001\r
+\r
+;;; ;;;carry flag set.\r
+;;; lda #$ff\r
+;;; adc #$01\r
+;;; jmp branch_boundary_test1\r
+;;; ;;fill dummy data to test page boundary instruction.\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;; .byte $00\r
+;;; ;;;single byte instruction page boundary test.\r
+;;;branch_boundary_test1:\r
+;;; BCS br_ad1\r
+;;; AND #$fb ;;this is skipped.\r
+;;;br_ad1:\r
+;;; STA $2000\r
+;;;\r
+;;; ;;dma test data.\r
+;;; ldy #$00\r
+;;; ldx #$41\r
+;;; stx $00\r
+;;; ldx #$00\r
+;;;dma_set:\r
+;;; ;;y pos\r
+;;; txa\r
+;;; sta $0200, y\r
+;;; iny\r
+;;; ;;tile index\r
+;;; lda $00\r
+;;; cmp #$5b\r
+;;; bne inc_tile\r
+;;; lda #$41\r
+;;; sta $00\r
+;;;inc_tile:\r
+;;; inc $00\r
+;;; sta $0200, y\r
+;;; iny\r
+;;; ;;attribute\r
+;;; lda #$01\r
+;;; sta $0200, y\r
+;;; iny\r
+;;; ;;x pos\r
+;;; txa\r
+;;; adc #$03\r
+;;; tax\r
+;;; rol\r
+;;; sta $0200, y\r
+;;; iny\r
+;;; bne dma_set\r
+\r
+;;; ;;dma start.\r
+;;; lda #$02\r
+;;; sta $4014\r
+\r
+ lda #$3f\r
+ sta $2006\r
+ lda #$00\r
+ sta $2006\r
+\r
+ ;;load palette.\r
+ ldx #$00\r
+ ldy #$20\r
+copypal:\r
+ lda palettes, x\r
+ sta $2007\r
+ inx\r
+ dey\r
+ bne copypal\r
+\r
+ lda #$20\r
+ sta $2006\r
+ lda #$ab\r
+ sta $2006\r
+ ldx #$00\r
+ ldy #$0d\r
+\r
+ ;;load name table.\r
+copymap:\r
+ lda string, x\r
+ sta $2007\r
+ inx\r
+ dey\r
+ bne copymap\r
+\r
+;; ;;;vertical show test.\r
+;; lda #$04\r
+;; sta $2000\r
+;;\r
+;; lda #$20\r
+;; sta $2006\r
+;; lda #$cb\r
+;; sta $2006\r
+;; ldx #$00\r
+;; ldy #$0d\r
+;;\r
+;; ;;load name table.\r
+;;copymap2:\r
+;; lda string, x\r
+;; sta $2007\r
+;; inx\r
+;; dey\r
+;; bne copymap2\r
+\r
+;; ;;vram read test\r
+;; lda #$20\r
+;; sta $2006\r
+;; lda #$ab\r
+;; sta $2006\r
+;;\r
+;; ldx #$0a\r
+;; lda $2007\r
+;;load_vram:\r
+;; lda $2007\r
+;; dex\r
+;; bne load_vram\r
+;;\r
+;; ;;palette read test\r
+;; lda #$3f\r
+;; sta $2006\r
+;; lda #$00\r
+;; sta $2006\r
+;;\r
+;; ldx #$0a\r
+;; lda $2007\r
+;;load_plt:\r
+;; lda $2007\r
+;; dex\r
+;; bne load_plt\r
+\r
+ ;;scroll reg set.\r
+ lda #$00\r
+ sta $2005\r
+ sta $2005\r
+\r
+ ;;show test msg.\r
+ lda #$1e\r
+ sta $2001\r
+\r
+;; jmp boundary_1\r
+;; ;;fill dummy data to test page boundary instruction.\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;; ;;;single byte instruction page boundary test.\r
+;;boundary_1:\r
+;; lda #$01\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;; ror\r
+;;;;this is pch increment at T1 cycle. \r
+;;;;;@80ff\r
+;; rol\r
+;; lsr\r
+;;\r
+;; jmp boundary_2_1\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_2_1:\r
+;; ;;;two byte instruction page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;;;;this is pch increment at T1 cycle. \r
+;; ;;;@81ff\r
+;; ldx #$08\r
+;;\r
+;;\r
+;; jmp boundary_2_2\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_2_2:\r
+;; ;;;two byte instruction page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; ror\r
+;;;;this is pch increment at next T0 cycle. \r
+;; ;;;@82fe\r
+;; ldx #$0a\r
+;;\r
+;; jmp boundary_2_3\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_2_3:\r
+;; ;;;two byte instruction w/ 3 exec cycle page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;;\r
+;; ror\r
+;; lda #$01\r
+;; lda #$de\r
+;; sta $13\r
+;;\r
+;;\r
+;;;;this is pch increment at T1 cycle. \r
+;; ;;;@83ff\r
+;; ldy $09, x\r
+;;\r
+;;\r
+;; jmp boundary_2_4\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_2_4:\r
+;; ;;;two byte instruction w/ 3 exec cycle page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; ldy #$05\r
+;;\r
+;; ror\r
+;; lda #$01\r
+;; lda #$de\r
+;;;;this is pch increment at T2 cycle. \r
+;; ;;;@84fe\r
+;; sta $13\r
+;;\r
+;;\r
+;; jmp boundary_3_1\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_3_1:\r
+;; ;;;three byte instruction w/ page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; ldy #$05\r
+;;\r
+;; ror\r
+;; lda #$01\r
+;; lda #$dd\r
+;;;;this is pch increment at T3 cycle. \r
+;; ;;;@85fd\r
+;; sta $06fc, x\r
+;;\r
+;; jmp boundary_3_2\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_3_2:\r
+;; ;;;three byte instruction w/ page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; ldy #$05\r
+;;\r
+;; lda #$01\r
+;; lda #$dd\r
+;;;;this is pch increment at T2 cycle. \r
+;; ;;;@86fe\r
+;; sta $06fc, x\r
+;;\r
+;; jmp boundary_3_3\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_3_3:\r
+;; ;;;three byte instruction w/ page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; lda #$01\r
+;; ldy #$05\r
+;;\r
+;; ldy #$08\r
+;; lda #$dd\r
+;;;;this is pch increment at T1 cycle. \r
+;; ;;;@87ff\r
+;; sta $06fc, x\r
+;;\r
+;; jmp boundary_3_4\r
+;;\r
+;; .byte $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;boundary_3_4:\r
+;; ;;;three byte instruction w/ page boundary test.\r
+;; lda #$01\r
+;; lda #$01\r
+;; ror\r
+;;\r
+;; ldy #$08\r
+;; lda #$dd\r
+;;;;this is pch increment at T0 cycle. \r
+;; ;;;@88fd\r
+;; sta $06fc, x\r
+;;\r
+;; nop\r
+;; nop\r
+;; nop\r
+;;\r
+;; ;;;instruction coverage test....\r
+;; ;;adc abs, y\r
+;; ldy #$10\r
+;; ldx #$fa\r
+;; stx $0790\r
+;; lda #$b0\r
+;; ;;fa+b0=aa\r
+;; adc $0780, y\r
+;;\r
+;; clc\r
+;; ldy #$ab\r
+;; ldx #$fa\r
+;; stx $082b\r
+;; lda #$dd\r
+;; ;;fa+dd=d7\r
+;; adc $0780, y\r
+;;\r
+;; ;;bit zp\r
+;; ldx #$15\r
+;; stx $2b\r
+;; bit $2b\r
+;; lda #$8a\r
+;; bit $2b\r
+;;\r
+;; ;;sbc imm\r
+;; ;;8a-5c=2e\r
+;; sbc #$5c\r
+;; ;;2e-3d=f1\r
+;; sbc #$3d\r
+;; ;;f1-e5=0c\r
+;; sbc #$e5\r
+;;\r
+;; ;;cli/clv\r
+;; cli\r
+;; ldx #$c0\r
+;; stx $2b\r
+;; bit $2b\r
+;; clv\r
+;;\r
+;; ;;adc zp, x/abs, x/indir, y\r
+;; lda #$11\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;11+81=92\r
+;; lda #$81\r
+;; adc $c0, x\r
+;;\r
+;; stx $0734\r
+;; ;93+e4=177\r
+;; adc $0650, x\r
+;;\r
+;; ldx #$c9\r
+;; stx $07e8\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$b4\r
+;; ;c9+07=d0\r
+;; adc ($07), y\r
+;;\r
+;; ;;and zp, x/abs/abs, x/indir, y\r
+;; lda #$f5\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;f5&5e=54\r
+;; lda #$5e\r
+;; and $c0, x\r
+;;\r
+;; stx $0734\r
+;; ;e4&54=44\r
+;; and $0650, x\r
+;;\r
+;; ldx #$c9\r
+;; stx $07e8\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$b4\r
+;; ;no page crossing\r
+;; ;c9&07=01\r
+;; and ($07), y\r
+;;\r
+;; ldx #$c9\r
+;; stx $0825\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$f1\r
+;; ;page crossing\r
+;; ;c9&07=01\r
+;; and ($07), y\r
+;;\r
+;; ;;cmp zp, x/abs/abs, x/indir, y\r
+;; lda #$de\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;c5-de=-19 > (e7)\r
+;; lda #$c5\r
+;; cmp $c0, x\r
+;;\r
+;; sec\r
+;; lda #$75\r
+;; stx $0734\r
+;; ;75-e4=-6f > 91\r
+;; cmp $0650, x\r
+;;\r
+;; ldx #$c9\r
+;; stx $0825\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$f1\r
+;; lda #$c9\r
+;; ;page crossing\r
+;; ;c9-c9=0\r
+;; cmp ($07), y\r
+;;\r
+;; ;;rol zp/zp, x/abs/abs, x\r
+;; lda #$de\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;de<1 =bc w/ carry\r
+;; clc\r
+;; rol $c0, x\r
+;; ;bc<1 =78 w/ carry\r
+;; rol $a4\r
+;;\r
+;; ldx #$64\r
+;; stx $0722\r
+;; ;64<1 = c8 w/o carry\r
+;; rol $06be, x\r
+;;\r
+;; ldx #$80\r
+;; stx $0734\r
+;; ;80<1 = 00 w/ carry.\r
+;; rol $0734\r
+;;\r
+;; ;;cpx abs\r
+;; ;;cpy zp/abs\r
+;; lda #$de\r
+;; sta $03a4\r
+;; ;c5-de=-19 > (e7)\r
+;; ldx #$c5\r
+;; cpx $03a4\r
+;;\r
+;; sec\r
+;; ldy #$75\r
+;; ldx #$e4\r
+;; stx $34\r
+;; ;75-e4=-6f > 91\r
+;; cpy $34\r
+;;\r
+;; ldx #$c9\r
+;; stx $0825\r
+;; ldy #$c9\r
+;; ;c9-c9=0\r
+;; cpy $0825\r
+;;\r
+;; ;;lsr zp/zp, x/abs/abs, x\r
+;; lda #$de\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;de>1 =6f w/o carry\r
+;; clc\r
+;; lsr $c0, x\r
+;; ;6f>1 =37 w/ carry\r
+;; lsr $a4\r
+;;\r
+;; ldx #$64\r
+;; stx $0722\r
+;; ;64>1 = 32 w/o carry\r
+;; lsr $06be, x\r
+;;\r
+;; ldx #$01\r
+;; stx $0734\r
+;; ;01>1 = 00 w/ carry.\r
+;; lsr $0734\r
+;;\r
+;; ;;ldy abs, x\r
+;; ;;ldx zp, y\r
+;; ldx #$fa\r
+;; stx $0820\r
+;; ;;page cross\r
+;; ldy $0726, x\r
+;;\r
+;; ldx #$10\r
+;; stx $0820\r
+;; ;no page cross\r
+;; ldy $0810, x\r
+;;\r
+;; ldy #$10\r
+;; sty $e0\r
+;; ldx #$55\r
+;; ldx $d0, y\r
+;;\r
+;; ;;dec zp, x/abs, x\r
+;; ;;inc zp, x/abs, x\r
+;; lda #$00\r
+;; ldx #$e4\r
+;; sta $88\r
+;; ldy #$00\r
+;; dec $a4, x\r
+;;\r
+;; ldx #$64\r
+;; stx $0722\r
+;; dec $06be, x\r
+;;\r
+;; lda #$fe\r
+;; ldx #$e4\r
+;; sta $88\r
+;; inc $a4, x\r
+;; inc $a4, x\r
+;; inc $a4, x\r
+;;\r
+;; ldx #$64\r
+;; stx $0722\r
+;; inc $06be, x\r
+;;\r
+;; ;;ror zp/zp,x/abs\r
+;; lda #$02\r
+;; ldx #$e4\r
+;; sta $88\r
+;; ror $a4, x\r
+;; ror $a4, x\r
+;; ror $a4, x\r
+;;\r
+;; ldx #$64\r
+;; stx $0722\r
+;; ror $0722\r
+;;\r
+;; ;;asl zp/zp,x/abs/abs,x\r
+;; lda #$40\r
+;; ldx #$e4\r
+;; sta $88\r
+;; asl $88\r
+;; asl $a4, x\r
+;; asl $a4, x\r
+;;\r
+;; ldx #$64\r
+;; stx $0722\r
+;; asl $06be,x\r
+;;\r
+;; ;;sta zp,x\r
+;; ;;stx zp,y\r
+;; ;;sty zp,x\r
+;; lda #$40\r
+;; ldx #$e4\r
+;; ldy #$c5\r
+;; sta $a4, x\r
+;; stx $a4, y\r
+;; sty $a4, x\r
+;;\r
+;; ;;branch page cross test.\r
+;; jmp bl_test0\r
+;;\r
+;;bl_test0:\r
+;; ldx #5\r
+;;bl_test1:\r
+;; dex\r
+;; ;;forward branch\r
+;; bpl bl_test2\r
+;;\r
+;; jmp bl_test2\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;bl_test2:\r
+;; dex\r
+;; ;;backward branch\r
+;; bpl bl_test1\r
+;;\r
+;; ;;test2\r
+;; ldx #5\r
+;;bl_test3:\r
+;; dex\r
+;; bpl bl_test4\r
+;;\r
+;; jmp bl_test4\r
+;;\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;; .byte $00, $01, $02, $03, $04, $05, $06, $07, $08, $09, $0a, $0b, $0c, $0d, $0e, $0f\r
+;;\r
+;;bl_test4:\r
+;; dex\r
+;; bpl bl_test3\r
+;;\r
+;; ;;ora zp, x/abs, x/indir, y\r
+;; lda #$de\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;c5|de=df\r
+;; lda #$c5\r
+;; ora $c0, x\r
+;;\r
+;; lda #$75\r
+;; stx $0734\r
+;; ;75|e4=f5\r
+;; ora $0650, x\r
+;;\r
+;; ldx #$c9\r
+;; stx $0825\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$f1\r
+;; ;page crossing\r
+;; ;07|c9=cf\r
+;; ora ($07), y\r
+;;\r
+;; ;;php/plp test\r
+;; sec\r
+;; sei\r
+;; php\r
+;;\r
+;; clc\r
+;; cli\r
+;; plp\r
+;;\r
+;; ;;eor zp, x/abs, x/indir, y\r
+;; lda #$de\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;c5^de=1b\r
+;; lda #$c5\r
+;; eor $c0, x\r
+;;\r
+;; lda #$75\r
+;; stx $0734\r
+;; ;75^e4=91\r
+;; eor $0650, x\r
+;;\r
+;; ldx #$07\r
+;; stx $0825\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$f1\r
+;; ;page crossing\r
+;; ;07^07=00\r
+;; eor ($07), y\r
+;;\r
+;; ;;sbc zp, x/abs, x/indir, y\r
+;; lda #$de\r
+;; ldx #$e4\r
+;; sta $a4\r
+;; ;c5-de=-19 > e7\r
+;; lda #$c5\r
+;; sbc $c0, x\r
+;;\r
+;; lda #$75\r
+;; stx $0734\r
+;; ;75-e4=-6f > 91\r
+;; sbc $0650, x\r
+;;\r
+;; ldx #$07\r
+;; stx $07ef\r
+;; lda #$34\r
+;; sta $07\r
+;; lda #$07\r
+;; sta $08\r
+;; ldy #$bb\r
+;; ;07-07=00\r
+;; sbc ($07), y\r
+;;\r
+;; ;;bvs/bvc test\r
+;; ;;-120=0x88\r
+;; lda #$88\r
+;;bvs_test:\r
+;; sbc #$10\r
+;; bvs bvs_test\r
+;; \r
+;; lda #$5\r
+;;bvc_test:\r
+;; sbc #$a\r
+;; bvc bvc_test\r
+;;\r
+;; ;;;;vram access test...\r
+;; lda #$00\r
+;; sta $2001 ;;disable bg\r
+;;\r
+;; LDA #$1e\r
+;; STA $2006\r
+;; LDA #$c0\r
+;; STA $2006 ;;;ppuaddr=1ec0\r
+;; LDA #$03\r
+;; STA $01\r
+;; LDY #$00\r
+;; STY $00\r
+;; LDA $2007 ;;;;from here acc broke...\r
+;; LDA $2007\r
+\r
+ ;;show bg...\r
+ lda #$1e\r
+ sta $2001\r
+\r
+ ;;;enable nmi\r
+ lda #$80\r
+ sta $2000\r
+\r
+ ;;read ppu status reg while displaying\r
+ ;;vram read test\r
+ ldx #$0a\r
+l1:\r
+ nop\r
+ dex\r
+ bne l1\r
+\r
+ ldx #$0a\r
+read_status:\r
+ lda $2002\r
+ dex\r
+ bne read_status\r
+\r
+\r
+\r
+ ;;done...\r
+ ;;infinite loop.\r
+mainloop:\r
+ jmp mainloop\r
+.endproc\r
+\r
+\r
+nmi_test:\r
+ ;;;;test...\r
+ STY $0720\r
+ LDY #$80\r
+ STY $0721\r
+ ASL \r
+ ASL \r
+ ASL \r
+ ASL \r
+ STA $06a0\r
+ DEC $0730\r
+ DEC $0731\r
+ DEC $0732\r
+ LDA #$0b\r
+ STA $071e\r
+ ;;JSR $9c22\r
+ LDA $0750\r
+ ;;JSR $9c09\r
+ AND #$60\r
+ ASL \r
+ ROL \r
+ ROL \r
+ ROL \r
+ STA $074e\r
+ ;;RTS \r
+ TAY \r
+ LDA $0750\r
+ AND #$1f\r
+ STA $074f\r
+ LDA $9ce0, y\r
+ CLC \r
+ ADC $074f\r
+ TAY \r
+ LDA $9ce4, y\r
+ STA $e9\r
+ LDA $9d06, y\r
+ STA $ea\r
+ LDY $074e\r
+ LDA $9d28, y\r
+ CLC \r
+ ADC $074f\r
+ TAY \r
+ LDA $9d2c, y\r
+ STA $e7\r
+ LDA $9d4e, y\r
+ STA $e8\r
+ LDY #$00\r
+ LDA ($e7), y\r
+ PHA \r
+ AND #$07\r
+ CMP #$04\r
+ ;;BCC +5\r
+ STA $0741\r
+ PLA \r
+ PHA \r
+ AND #$38\r
+ LSR \r
+ LSR \r
+ LSR \r
+ STA $0710\r
+ PLA \r
+ AND #$c0\r
+ CLC \r
+ ROL \r
+ ROL \r
+ ROL \r
+ STA $0715\r
+ INY \r
+ LDA ($e7), y\r
+ PHA \r
+ AND #$0f\r
+ STA $0727\r
+ PLA \r
+ PHA \r
+ AND #$30\r
+ LSR \r
+ LSR \r
+ LSR \r
+ LSR \r
+ STA $0742\r
+ PLA \r
+ AND #$c0\r
+ CLC \r
+ ROL \r
+ ROL \r
+ ROL \r
+ CMP #$03\r
+ ;;BNE 5\r
+ STA $0733\r
+ LDA $e7\r
+ CLC \r
+ ADC #$02\r
+ STA $e7\r
+ LDA $e8\r
+ ADC #$00\r
+ STA $e8\r
+ ;;RTS \r
+ LDA $076a\r
+ ;;BNE 16\r
+ LDA $075f\r
+ CMP #$04\r
+ ;BCC 12\r
+ LDA $075b\r
+ ;;BEQ 5\r
+ LDA #$80\r
+ STA $fb\r
+ LDA #$01\r
+ STA $0774\r
+ INC $0772\r
+ ;;RTS \r
+ LDA $2002\r
+ ;PLA \r
+ ORA #$80\r
+ STA $2000\r
+ rti\r
+\r
+palettes:\r
+ .byte $0f, $00, $10, $20\r
+ .byte $0f, $06, $16, $26\r
+ .byte $0f, $08, $18, $28\r
+ .byte $0f, $0a, $1a, $2a\r
+ .byte $0f, $00, $10, $20\r
+ .byte $0f, $06, $16, $26\r
+ .byte $0f, $08, $18, $28\r
+ .byte $0f, $0a, $1a, $2a\r
+\r
+string:\r
+ .byte "test2!"\r
+\r
+.segment "VECINFO"\r
+ .word nmi_test\r
+ .word Reset\r
+ .word $0000\r
+\r
+; character rom file.\r
+.segment "CHARS"\r
+ .incbin "character.chr"\r