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drm/amd/display: populate link res in both detection and validation
authorWenjing Liu <wenjing.liu@amd.com>
Fri, 26 Nov 2021 23:46:22 +0000 (18:46 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 30 Dec 2021 13:54:44 +0000 (08:54 -0500)
[why]
This commit is to populate link res in preparation of the next commit.
The next commit will replace all existing code to use link res instead

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
drivers/gpu/drm/amd/display/dc/inc/core_types.h

index 4130cd9..a394946 100644 (file)
@@ -881,6 +881,7 @@ static bool dc_link_detect_helper(struct dc_link *link,
        enum dc_connection_type pre_connection_type = dc_connection_none;
        bool perform_dp_seamless_boot = false;
        const uint32_t post_oui_delay = 30; // 30ms
+       struct link_resource link_res = { 0 };
 
        DC_LOGGER_INIT(link->ctx->logger);
 
@@ -974,8 +975,10 @@ static bool dc_link_detect_helper(struct dc_link *link,
                        }
 
 #if defined(CONFIG_DRM_AMD_DC_DCN)
-                       if (dp_get_link_encoding_format(&link->reported_link_cap) == DP_128b_132b_ENCODING)
+                       if (dp_get_link_encoding_format(&link->reported_link_cap) == DP_128b_132b_ENCODING) {
                                add_dp_hpo_link_encoder_to_link(link);
+                               link_res.hpo_dp_link_enc = link->hpo_dp_link_enc;
+                       }
 #endif
 
                        if (link->type == dc_connection_mst_branch) {
@@ -986,7 +989,7 @@ static bool dc_link_detect_helper(struct dc_link *link,
                                 * empty which leads to allocate_mst_payload() has "0"
                                 * pbn_per_slot value leading to exception on dc_fixpt_div()
                                 */
-                               dp_verify_mst_link_cap(link, NULL);
+                               dp_verify_mst_link_cap(link, &link_res);
 
                                /*
                                 * This call will initiate MST topology discovery. Which
@@ -1150,7 +1153,7 @@ static bool dc_link_detect_helper(struct dc_link *link,
                        // verify link cap for SST non-seamless boot
                        if (!perform_dp_seamless_boot)
                                dp_verify_link_cap_with_retries(link,
-                                                               NULL,
+                                                               &link_res,
                                                                &link->reported_link_cap,
                                                                LINK_TRAINING_MAX_VERIFY_RETRY);
                } else {
index 0da692c..60a9eb6 100644 (file)
@@ -2161,6 +2161,7 @@ enum dc_status resource_map_pool_resources(
                                        &context->res_ctx, pool,
                                        pipe_ctx->stream_res.hpo_dp_stream_enc,
                                        true);
+                       pipe_ctx->link_res.hpo_dp_link_enc = stream->link->hpo_dp_link_enc;
                }
        }
 #endif
index 9381ea0..0bd28a3 100644 (file)
@@ -336,7 +336,11 @@ struct plane_resource {
 
 /* all mappable hardware resources used to enable a link */
 struct link_resource {
+#if defined(CONFIG_DRM_AMD_DC_DCN)
+       struct hpo_dp_link_encoder *hpo_dp_link_enc;
+#else
        void *dummy;
+#endif
 };
 
 union pipe_update_flags {