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[X86] Add test cases showing the disassembler producing an xmm16-xmm31 register in...
author
Craig Topper
<craig.topper@intel.com>
Fri, 1 Jun 2018 00:10:32 +0000
(
00:10
+0000)
committer
Craig Topper
<craig.topper@intel.com>
Fri, 1 Jun 2018 00:10:32 +0000
(
00:10
+0000)
We aren't properly suppressing the reading of VEX.R' and VEX.V' in 32-bit mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@333713
91177308
-0d34-0410-b5e6-
96231b3b80d8
test/MC/Disassembler/X86/x86-32.txt
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diff --git
a/test/MC/Disassembler/X86/x86-32.txt
b/test/MC/Disassembler/X86/x86-32.txt
index
868134f
..
edd3804
100644
(file)
--- a/
test/MC/Disassembler/X86/x86-32.txt
+++ b/
test/MC/Disassembler/X86/x86-32.txt
@@
-883,3
+883,9
@@
#CHECK: enclv
0x0f 0x01 0xc0
+
+#CHECK: vaddps %xmm2, %xmm1, %xmm16
+0x62 0xe1 0x74 0x00 0x58 0xc2
+
+#CHECK: vgatherdps (%esi,%zmm16,4), %zmm1 {%k2}
+0x62 0xf2 0x7d 0x42 0x92 0x0c 0x86