[ARM64] Correctly alias LSL to UXTW for 32bit instruction variants, rather than UXTX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205861 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp b/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
index 38a61d8..b406617 100644 (file)
--- a/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
+++ b/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp
@@ -714,7 +714,7 @@ public:
   bool isPrefetch() const { return Kind == k_Prefetch; }
   bool isShifter() const { return Kind == k_Shifter; }
   bool isExtend() const {
-    // lsl is an alias for UXTX but will be a parsed as a k_Shifter operand.
+    // lsl is an alias for UXTW but will be a parsed as a k_Shifter operand.
     if (isShifter()) {
       ARM64_AM::ShiftType ST = ARM64_AM::getShiftType(Shifter.Val);
       return ST == ARM64_AM::LSL;
@@ -1346,10 +1346,10 @@ public:
 
   void addExtendOperands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
-    // lsl is an alias for UXTX but will be a parsed as a k_Shifter operand.
+    // lsl is an alias for UXTW but will be a parsed as a k_Shifter operand.
     if (isShifter()) {
       assert(ARM64_AM::getShiftType(getShifter()) == ARM64_AM::LSL);
-      unsigned imm = getArithExtendImm(ARM64_AM::UXTX,
+      unsigned imm = getArithExtendImm(ARM64_AM::UXTW,
                                        ARM64_AM::getShiftValue(getShifter()));
       Inst.addOperand(MCOperand::CreateImm(imm));
     } else

diff --git a/test/MC/ARM64/aliases.s b/test/MC/ARM64/aliases.s
index 055edb5..0afaa05 100644 (file)
--- a/test/MC/ARM64/aliases.s
+++ b/test/MC/ARM64/aliases.s
@@ -103,7 +103,7 @@ foo:
 ; CHECK: cmp   wzr, w1                 ; encoding: [0xff,0x03,0x01,0x6b]
 ; CHECK: cmp   x8, w8, uxtw            ; encoding: [0x1f,0x41,0x28,0xeb]
 ; CHECK: cmp   w9, w8, uxtw            ; encoding: [0x3f,0x41,0x28,0x6b]
-; CHECK: cmp   wsp, w9                 ; encoding: [0xff,0x63,0x29,0x6b]
+; CHECK: cmp   wsp, w9                 ; encoding: [0xff,0x43,0x29,0x6b]
 
 
 ;-----------------------------------------------------------------------------

diff --git a/test/MC/ARM64/arithmetic-encoding.s b/test/MC/ARM64/arithmetic-encoding.s
index 7c89244..3177ca4 100644 (file)
--- a/test/MC/ARM64/arithmetic-encoding.s
+++ b/test/MC/ARM64/arithmetic-encoding.s
@@ -223,7 +223,7 @@ foo:
 
 ; CHECK: add w1, wsp, w3             ; encoding: [0xe1,0x43,0x23,0x0b]
 ; CHECK: add w1, wsp, w3             ; encoding: [0xe1,0x43,0x23,0x0b]
-; CHECK: add w2, wsp, w3, lsl #1     ; encoding: [0xe2,0x67,0x23,0x0b]
+; CHECK: add w2, wsp, w3, lsl #1     ; encoding: [0xe2,0x47,0x23,0x0b]
 ; CHECK: add sp, x2, x3              ; encoding: [0x5f,0x60,0x23,0x8b]
 ; CHECK: add sp, x2, x3              ; encoding: [0x5f,0x60,0x23,0x8b]
 
@@ -313,7 +313,7 @@ foo:
 
 ; CHECK: adds w1, wsp, w3            ; encoding: [0xe1,0x43,0x23,0x2b]
 ; CHECK: adds w1, wsp, w3            ; encoding: [0xe1,0x43,0x23,0x2b]
-; CHECK: adds wzr, wsp, w3, lsl #4   ; encoding: [0xff,0x73,0x23,0x2b]
+; CHECK: adds wzr, wsp, w3, lsl #4   ; encoding: [0xff,0x53,0x23,0x2b]
 
   subs w1, w2, w3, uxtb
   subs w1, w2, w3, uxth
@@ -364,7 +364,7 @@ foo:
   cmp sp, w8, uxtw
   subs xzr, sp, w8, uxtw
 
-; CHECK: cmp wsp, w9                 ; encoding: [0xff,0x63,0x29,0x6b]
+; CHECK: cmp wsp, w9                 ; encoding: [0xff,0x43,0x29,0x6b]
 ; CHECK: subs x3, sp, x9, lsl #2     ; encoding: [0xe3,0x6b,0x29,0xeb]
 ; CHECK: cmp wsp, w8                 ; encoding: [0xff,0x43,0x28,0x6b]
 ; CHECK: cmp wsp, w8                 ; encoding: [0xff,0x43,0x28,0x6b]