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clk: meson: g12a: fix VPU clock muxes mask
author
Maxime Jourdan
<mjourdan@baylibre.com>
Tue, 19 Mar 2019 08:26:11 +0000
(09:26 +0100)
committer
Neil Armstrong
<narmstrong@baylibre.com>
Tue, 19 Mar 2019 16:38:00 +0000
(17:38 +0100)
There are 8 parents, use 0x7
Fixes:
085a4ea93d54
("clk: meson: g12a: add peripheral clock controller")
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Link:
https://lkml.kernel.org/r/20190319082611.6215-1-mjourdan@baylibre.com
drivers/clk/meson/g12a.c
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diff --git
a/drivers/clk/meson/g12a.c
b/drivers/clk/meson/g12a.c
index
0e1ce8c
..
683769f
100644
(file)
--- a/
drivers/clk/meson/g12a.c
+++ b/
drivers/clk/meson/g12a.c
@@
-967,7
+967,7
@@
static const char * const g12a_vpu_parent_names[] = {
static struct clk_regmap g12a_vpu_0_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = HHI_VPU_CLK_CNTL,
- .mask = 0x
3
,
+ .mask = 0x
7
,
.shift = 9,
},
.hw.init = &(struct clk_init_data){
@@
-1011,7
+1011,7
@@
static struct clk_regmap g12a_vpu_0 = {
static struct clk_regmap g12a_vpu_1_sel = {
.data = &(struct clk_regmap_mux_data){
.offset = HHI_VPU_CLK_CNTL,
- .mask = 0x
3
,
+ .mask = 0x
7
,
.shift = 25,
},
.hw.init = &(struct clk_init_data){