octeontx2-af: Add LMAC channel info to NIXLF_ALLOC response

Add LMAC channel info like Rx/Tx channel base and count to
NIXLF_ALLOC mailbox message response. This info is used by
NIXLF attached RVU PF/VF to configure SQ's default channel,
TL3_TL2_LINKX_CFG and to install MCAM rules in NPC based
on matching ingress channel number.

Signed-off-by: Stanislaw Kardach <skardach@marvell.com>
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Sunil Goutham <sgoutham@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/common.h b/drivers/net/ethernet/marvell/octeontx2/af/common.h
index e438f92..6c8150d 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/common.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/common.h
@@ -169,6 +169,7 @@ enum nix_scheduler {
 
 #define MAX_LMAC_PKIND                 12
 #define NIX_LINK_CGX_LMAC(a, b)                (0 + 4 * (a) + (b))
+#define NIX_CHAN_CGX_LMAC_CHX(a, b, c) (0x800 + 0x100 * (a) + 0x10 * (b) + (c))
 
 /* NIX LSO format indices.
  * As of now TSO is the only one using, so statically assigning indices.

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index b60ac9d..0e2552c 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -382,6 +382,10 @@ struct nix_lf_alloc_req {
 struct nix_lf_alloc_rsp {
        struct mbox_msghdr hdr;
        u16     sqb_size;
+       u16     rx_chan_base;
+       u16     tx_chan_base;
+       u8      rx_chan_cnt; /* total number of RX channels */
+       u8      tx_chan_cnt; /* total number of TX channels */
        u8      lso_tsov4_idx;
        u8      lso_tsov6_idx;
        u8      mac_addr[ETH_ALEN];

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
index 9fa5183..12391d2 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h
@@ -118,6 +118,11 @@ struct rvu_pfvf {
        unsigned long   *rq_bmap;
        unsigned long   *cq_bmap;
 
+       u16             rx_chan_base;
+       u16             tx_chan_base;
+       u8              rx_chan_cnt; /* total number of RX channels */
+       u8              tx_chan_cnt; /* total number of TX channels */
+
        u8              mac_addr[ETH_ALEN]; /* MAC address of this PF/VF */
 
        /* Broadcast pkt replication info */

diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
index 55075e7..86b1e9b 100644 (file)
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c
@@ -140,6 +140,10 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
                                "PF_Func 0x%x: Invalid pkind\n", pcifunc);
                        return -EINVAL;
                }
+               pfvf->rx_chan_base = NIX_CHAN_CGX_LMAC_CHX(cgx_id, lmac_id, 0);
+               pfvf->tx_chan_base = pfvf->rx_chan_base;
+               pfvf->rx_chan_cnt = 1;
+               pfvf->tx_chan_cnt = 1;
                cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);
                rvu_npc_set_pkind(rvu, pkind, pfvf);
                break;
@@ -799,6 +803,10 @@ exit:
        /* set SQB size info */
        cfg = rvu_read64(rvu, blkaddr, NIX_AF_SQ_CONST);
        rsp->sqb_size = (cfg >> 34) & 0xFFFF;
+       rsp->rx_chan_base = pfvf->rx_chan_base;
+       rsp->tx_chan_base = pfvf->tx_chan_base;
+       rsp->rx_chan_cnt = pfvf->rx_chan_cnt;
+       rsp->tx_chan_cnt = pfvf->tx_chan_cnt;
        rsp->lso_tsov4_idx = NIX_LSO_FORMAT_IDX_TSOV4;
        rsp->lso_tsov6_idx = NIX_LSO_FORMAT_IDX_TSOV6;
        return rc;