radeon/r200/r300: fix warnings

diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index ae31bcb..83375c8 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -112,7 +112,6 @@ void r200EmitVbufPrim( r200ContextPtr rmesa,
                        GLuint primitive,
                        GLuint vertex_nr )
 {
-   drm_radeon_cmd_header_t *cmd;
    BATCH_LOCALS(&rmesa->radeon);
 
    assert(!(primitive & R200_VF_PRIM_WALK_IND));
@@ -164,8 +163,7 @@ static void r200FireEB(r200ContextPtr rmesa, int vertex_count, int type)
 
 void r200FlushElts(GLcontext *ctx)
 {
-  r200ContextPtr rmesa = R200_CONTEXT(ctx);
-   int dwords;
+   r200ContextPtr rmesa = R200_CONTEXT(ctx);
    int nr, elt_used = rmesa->tcl.elt_used;
 
    if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_PRIMS))
@@ -345,14 +343,3 @@ void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset)
    }
    END_BATCH();
 }
-
-void r200FireAOS(r200ContextPtr rmesa, int vertex_count, int type)
-{
-       BATCH_LOCALS(&rmesa->radeon);
-
-       BEGIN_BATCH(3);
-       OUT_BATCH_PACKET3(R200_CP_CMD_3D_DRAW_VBUF_2, 0);
-       OUT_BATCH(R200_VF_PRIM_WALK_LIST | (vertex_count << 16) | type);
-       END_BATCH();
-}
-

diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index d3898d0..564e168 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -243,7 +243,6 @@ static void r200_get_lock(radeonContextPtr radeon)
 {
    r200ContextPtr rmesa = (r200ContextPtr)radeon;
    drm_radeon_sarea_t *sarea = radeon->sarea;
-   int i;
 
    R200_STATECHANGE( rmesa, ctx );
    if (rmesa->radeon.sarea->tiling_enabled) {

diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index ccb5620..b8e40da 100644 (file)
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -193,7 +193,6 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask )
    __DRIdrawablePrivate *dPriv = rmesa->radeon.dri.drawable;
    GLuint flags = 0;
    GLuint color_mask = 0;
-   GLint ret;
    GLuint orig_mask = mask;
 
    if ( R200_DEBUG & DEBUG_IOCTL ) {

diff --git a/src/mesa/drivers/dri/r300/r300_state.c b/src/mesa/drivers/dri/r300/r300_state.c
index f49b43c..6796d36 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_state.c
+++ b/src/mesa/drivers/dri/r300/r300_state.c
@@ -42,6 +42,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/macros.h"
 #include "main/context.h"
 #include "main/dd.h"
+#include "main/framebuffer.h"
 #include "main/simple_list.h"
 #include "main/api_arrayelt.h"
 #include "main/texformat.h"
@@ -2029,7 +2030,6 @@ static void r300Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 static void r300ResetHwState(r300ContextPtr r300)
 {
        GLcontext *ctx = r300->radeon.glCtx;
-       struct radeon_renderbuffer *rrb;
        int has_tcl = 1;
 
        if (!(r300->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL))
@@ -2039,7 +2039,6 @@ static void r300ResetHwState(r300ContextPtr r300)
                fprintf(stderr, "%s\n", __FUNCTION__);
 
        radeon_firevertices(&r300->radeon);
-       //r300UpdateWindow(ctx);
 
        r300ColorMask(ctx,
                      ctx->Color.ColorMask[RCOMP],
@@ -2524,9 +2523,6 @@ static void r300InvalidateState(GLcontext * ctx, GLuint new_state)
  */
 void r300InitState(r300ContextPtr r300)
 {
-       GLcontext *ctx = r300->radeon.glCtx;
-       GLuint depth_fmt;
-
        memset(&(r300->state.texture), 0, sizeof(r300->state.texture));
 
        r300ResetHwState(r300);

diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 5b23473..9964de7 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -36,6 +36,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xmlpool.h"           /* for symbolic values of enum-type options */
 #include "utils.h"
 #include "vblank.h"
+#include "drirenderbuffer.h"
 #include "main/state.h"
 
 #define DRIVER_DATE "20090101"
@@ -398,7 +399,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
        struct radeon_framebuffer *draw;
        radeonContextPtr radeon;
        char *regname;
-       struct radeon_bo *depth_bo, *bo;
+       struct radeon_bo *depth_bo = NULL, *bo;
 
        if (RADEON_DEBUG & DEBUG_DRI)
            fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);

diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c
index 4094585..96ba5d3 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_fbo.c
+++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c
@@ -510,8 +510,9 @@ radeon_render_texture(GLcontext * ctx,
                                             att->TextureLevel);
 
    if (att->Texture->Target == GL_TEXTURE_3D) {
-      const GLuint *offsets = radeon_miptree_depth_offsets(radeon_image->mt,
-                                                          att->TextureLevel);
+      GLuint offsets[6];
+      radeon_miptree_depth_offsets(radeon_image->mt, att->TextureLevel,
+                                  offsets);
       imageOffset += offsets[att->Zoffset];
    }
 

diff --git a/src/mesa/drivers/dri/radeon/radeon_lock.c b/src/mesa/drivers/dri/radeon/radeon_lock.c
index e1bb2cd..fe19218 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_lock.c
+++ b/src/mesa/drivers/dri/radeon/radeon_lock.c
@@ -61,7 +61,6 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags)
        __DRIdrawablePrivate *const drawable = rmesa->dri.drawable;
        __DRIdrawablePrivate *const readable = rmesa->dri.readable;
        __DRIscreenPrivate *sPriv = rmesa->dri.screen;
-       drm_radeon_sarea_t *sarea = rmesa->sarea;
 
        assert(drawable != NULL);
 
@@ -92,7 +91,6 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags)
 
 void radeon_lock_hardware(radeonContextPtr radeon)
 {
-       __DRIdrawable *dPriv = radeon->dri.drawable;
        char ret = 0;
        struct radeon_framebuffer *rfb = NULL;
        struct radeon_renderbuffer *rrb = NULL;

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index 228629e..34d6261 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -94,8 +94,6 @@ static void compute_tex_image_offset(radeon_mipmap_tree *mt,
        /* Find image size in bytes */
        if (mt->compressed) {
                /* TODO: Is this correct? Need test cases for compressed textures! */
-               GLuint align;
-
                lvl->rowstride = (lvl->width * mt->bpp + 63) & ~63;
                lvl->size = radeon_compressed_texture_size(mt->radeon->glCtx,
                                                           lvl->width, lvl->height, lvl->depth, mt->compressed);
@@ -365,14 +363,16 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
  *
  * These functions present that view to mesa:
  */
-const GLuint *
-radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level)
+void
+radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets)
 {
-     static const GLuint zero = 0;
      if (mt->target != GL_TEXTURE_3D || mt->faces == 1)
-       return &zero;
-     else
-       return mt->levels[level].faces[0].offset;
+        offsets[0] = 0;
+     else {
+       int i;
+       for (i = 0; i < 6; i++)
+               offsets[i] = mt->levels[level].faces[i].offset;
+     }
 }
 
 GLuint

diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
index d9ad5ad..697010b 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.h
@@ -94,6 +94,5 @@ void radeon_try_alloc_miptree(radeonContextPtr rmesa, radeonTexObj *t,
                              struct gl_texture_image *texImage, GLuint face, GLuint level);
 GLuint radeon_miptree_image_offset(radeon_mipmap_tree *mt,
                                   GLuint face, GLuint level);
-const GLuint *
-radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level);
+void radeon_miptree_depth_offsets(radeon_mipmap_tree *mt, GLuint level, GLuint *offsets);
 #endif /* __RADEON_MIPMAP_TREE_H_ */

diff --git a/src/mesa/drivers/dri/radeon/radeon_span.c b/src/mesa/drivers/dri/radeon/radeon_span.c
index 3d2c5da..0b4eaae 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_span.c
+++ b/src/mesa/drivers/dri/radeon/radeon_span.c
@@ -377,7 +377,7 @@ do {                                                                        \
 #include "stenciltmp.h"
 
 
-void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
+static void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
 {
        struct radeon_renderbuffer *rrb = radeon_renderbuffer(rb);
        int r;
@@ -403,7 +403,6 @@ void map_unmap_rb(struct gl_renderbuffer *rb, int flag)
 static void
 radeon_map_unmap_buffers(GLcontext *ctx, GLboolean map)
 {
-       radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
        GLuint i, j;
 
        /* color draw buffers */

diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
index af933a3..2484006 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c
@@ -825,6 +825,4 @@ void radeonInitSwtcl( GLcontext *ctx )
 
 void radeonDestroySwtcl( GLcontext *ctx )
 {
-   r100ContextPtr rmesa = R100_CONTEXT(ctx);
-
 }

diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c
index 78e2a08..9931f01 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_texstate.c
+++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c
@@ -775,11 +775,6 @@ void radeonSetTexBuffer(__DRIcontext *pDRICtx, GLint target, __DRIdrawable *dPri
 static void disable_tex_obj_state( r100ContextPtr rmesa, 
                                   int unit )
 {
-   /* do not use RADEON_DB_STATE to avoid stale texture caches */
-   uint32_t *cmd = &rmesa->hw.tex[unit].cmd[TEX_CMD_0];
-   GLuint se_coord_fmt = rmesa->hw.set.cmd[SET_SE_COORDFMT];
-   GLuint *txr_cmd = RADEON_DB_STATE( txr[unit] );
-
    RADEON_STATECHANGE( rmesa, tex[unit] );
 
    RADEON_STATECHANGE( rmesa, tcl );
@@ -1142,8 +1137,6 @@ static GLboolean radeon_validate_texture(GLcontext *ctx, struct gl_texture_objec
 static GLboolean radeonUpdateTextureUnit( GLcontext *ctx, int unit )
 {
    r100ContextPtr rmesa = R100_CONTEXT(ctx);
-   struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
-
 
    if (ctx->Texture.Unit[unit]._ReallyEnabled & TEXTURE_3D_BIT) {
      return GL_FALSE;