drm/amd/display: allow set dp drive setting when stream is not present

[why]
There is a change previously to disallow DM to set dp drive setings when
stream is not present. The logic might not work well with DP PHY
complaince scenario with a PHY test fixture attachment. We need to make
the method allow DP link drive settings changes even without stream
attached to it.

[how]
revert back to previous code in set drive setting function then add an
empty link_resource structure, then assign link resource based on
current link resource if link resource is allocated to the current pipe.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 47cced9..1e596f1 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -4455,22 +4455,17 @@ void dc_link_set_drive_settings(struct dc *dc,
 {
 
        int i;
-       struct pipe_ctx *pipe = NULL;
-       const struct link_resource *link_res;
+       struct link_resource link_res;
 
-       link_res = dc_link_get_cur_link_res(link);
+       for (i = 0; i < dc->link_count; i++)
+               if (dc->links[i] == link)
+                       break;
 
-       for (i = 0; i < MAX_PIPES; i++) {
-               pipe = &dc->current_state->res_ctx.pipe_ctx[i];
-               if (pipe->stream && pipe->stream->link) {
-                       if (pipe->stream->link == link)
-                               break;
-               }
-       }
-       if (pipe && link_res)
-               dc_link_dp_set_drive_settings(pipe->stream->link, link_res, lt_settings);
-       else
+       if (i >= dc->link_count)
                ASSERT_CRITICAL(false);
+
+       dc_link_get_cur_link_res(link, &link_res);
+       dc_link_dp_set_drive_settings(dc->links[i], &link_res, lt_settings);
 }
 
 void dc_link_set_preferred_link_settings(struct dc *dc,
@@ -4712,23 +4707,24 @@ uint32_t dc_bandwidth_in_kbps_from_timing(
 
 }
 
-const struct link_resource *dc_link_get_cur_link_res(const struct dc_link *link)
+void dc_link_get_cur_link_res(const struct dc_link *link,
+               struct link_resource *link_res)
 {
        int i;
        struct pipe_ctx *pipe = NULL;
-       const struct link_resource *link_res = NULL;
+
+       memset(link_res, 0, sizeof(*link_res));
 
        for (i = 0; i < MAX_PIPES; i++) {
                pipe = &link->dc->current_state->res_ctx.pipe_ctx[i];
                if (pipe->stream && pipe->stream->link && pipe->top_pipe == NULL) {
                        if (pipe->stream->link == link) {
-                               link_res = &pipe->link_res;
+                               *link_res = pipe->link_res;
                                break;
                        }
                }
        }
 
-       return link_res;
 }
 
 /**

diff --git a/drivers/gpu/drm/amd/display/dc/dc_link.h b/drivers/gpu/drm/amd/display/dc/dc_link.h
index b1c79b3..6c02244 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc_link.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_link.h
@@ -459,7 +459,8 @@ bool dc_link_should_enable_fec(const struct dc_link *link);
 uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);
 enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
 
-const struct link_resource *dc_link_get_cur_link_res(const struct dc_link *link);
+void dc_link_get_cur_link_res(const struct dc_link *link,
+               struct link_resource *link_res);
 /* take a snapshot of current link resource allocation state */
 void dc_get_cur_link_res_map(const struct dc *dc, uint32_t *map);
 /* restore link resource allocation state from a snapshot */