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ARM: dts: ux500: Break out DB8500 DTSI
authorLinus Walleij <linus.walleij@linaro.org>
Tue, 26 Nov 2019 12:47:35 +0000 (13:47 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Mon, 9 Dec 2019 13:45:02 +0000 (14:45 +0100)
The DB8500 exists in an enhanced variant named DB8520
for some machines. To clearly distinguish between the
different machines, create an explicit db8500.dtsi
and move the operating points (only known difference so
far) to that file, so we can add an explicit db8520.dtsi
after this.

Cc: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191126124738.77690-1-linus.walleij@linaro.org
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
arch/arm/boot/dts/ste-db8500.dtsi [new file with mode: 0644]
arch/arm/boot/dts/ste-dbx5x0.dtsi
arch/arm/boot/dts/ste-href.dtsi
arch/arm/boot/dts/ste-hrefprev60-stuib.dts
arch/arm/boot/dts/ste-hrefprev60-tvk.dts
arch/arm/boot/dts/ste-hrefprev60.dtsi
arch/arm/boot/dts/ste-hrefv60plus-stuib.dts
arch/arm/boot/dts/ste-hrefv60plus-tvk.dts
arch/arm/boot/dts/ste-hrefv60plus.dtsi
arch/arm/boot/dts/ste-snowball.dts

diff --git a/arch/arm/boot/dts/ste-db8500.dtsi b/arch/arm/boot/dts/ste-db8500.dtsi
new file mode 100644 (file)
index 0000000..d309fad
--- /dev/null
@@ -0,0 +1,15 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "ste-dbx5x0.dtsi"
+
+/ {
+       cpus {
+               cpu@300 {
+                       /* cpufreq controls */
+                       operating-points = <998400 0
+                                           800000 0
+                                           400000 0
+                                           200000 0>;
+               };
+       };
+};
index 5a94038..6671f74 100644 (file)
                        device_type = "cpu";
                        compatible = "arm,cortex-a9";
                        reg = <0x300>;
-                       /* cpufreq controls */
-                       operating-points = <998400 0
-                                           800000 0
-                                           400000 0
-                                           200000 0>;
                        clocks = <&prcmu_clk PRCMU_ARMSS>;
                        clock-names = "cpu";
                        clock-latency = <20000>;
index 5eafd5d..33e3b0b 100644 (file)
@@ -4,7 +4,6 @@
  */
 
 #include <dt-bindings/interrupt-controller/irq.h>
-#include "ste-dbx5x0.dtsi"
 #include "ste-href-family-pinctrl.dtsi"
 
 / {
index d240513..8ce6b72 100644 (file)
@@ -4,8 +4,7 @@
  */
 
 /dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
+#include "ste-db8500.dtsi"
 #include "ste-hrefprev60.dtsi"
 #include "ste-href-stuib.dtsi"
 
index 54b0f82..8b88c91 100644 (file)
@@ -4,6 +4,7 @@
  */
 
 /dts-v1/;
+#include "ste-db8500.dtsi"
 #include "ste-hrefprev60.dtsi"
 #include "ste-href-tvk1281618.dtsi"
 
index 937f942..115495d 100644 (file)
@@ -5,7 +5,6 @@
  * Device Tree for the HREF+ prior to the v60 variant.
  */
 
-#include "ste-dbx5x0.dtsi"
 #include "ste-href-ab8500.dtsi"
 #include "ste-href.dtsi"
 
index 36163c0..1316886 100644 (file)
@@ -6,8 +6,7 @@
  */
 
 /dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/interrupt-controller/irq.h>
+#include "ste-db8500.dtsi"
 #include "ste-hrefv60plus.dtsi"
 #include "ste-href-stuib.dtsi"
 
index cf59e9b..b31e43d 100644 (file)
@@ -6,6 +6,7 @@
  */
 
 /dts-v1/;
+#include "ste-db8500.dtsi"
 #include "ste-hrefv60plus.dtsi"
 #include "ste-href-tvk1281618.dtsi"
 
index aece8eb..05b4fbb 100644 (file)
@@ -3,7 +3,6 @@
  * Copyright 2012 ST-Ericsson AB
  */
 
-#include "ste-dbx5x0.dtsi"
 #include "ste-href-ab8500.dtsi"
 #include "ste-href.dtsi"
 
index f8dec39..be90e73 100644 (file)
@@ -4,7 +4,7 @@
  */
 
 /dts-v1/;
-#include "ste-dbx5x0.dtsi"
+#include "ste-db8500.dtsi"
 #include "ste-href-ab8500.dtsi"
 #include "ste-href-family-pinctrl.dtsi"