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pci: fix bridge control bit wmask
authorMichael S. Tsirkin <mst@redhat.com>
Thu, 18 Nov 2010 08:42:50 +0000 (10:42 +0200)
committerMichael S. Tsirkin <mst@redhat.com>
Mon, 22 Nov 2010 08:00:06 +0000 (10:00 +0200)
Bits 12 to 15 in bridge control register are reserver and must be
read-only zero, curent mask is 0xffff which makes them writeable. Fix
this up by using symbolic bit names for writeable bits instead of a
hardcoded constant.

Fix a comment w1mask -> w1cmask as well.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
hw/pci.c

index 00ec8ea..fc5d340 100644 (file)
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -558,7 +558,7 @@ static void pci_init_wmask(PCIDevice *dev)
 static void pci_init_w1cmask(PCIDevice *dev)
 {
     /*
-     * Note: It's okay to set w1mask even for readonly bits as
+     * Note: It's okay to set w1cmask even for readonly bits as
      * long as their value is hardwired to 0.
      */
     pci_set_word(dev->w1cmask + PCI_STATUS,
@@ -588,7 +588,29 @@ static void pci_init_wmask_bridge(PCIDevice *d)
     /* PCI_PREF_BASE_UPPER32 and PCI_PREF_LIMIT_UPPER32 */
     memset(d->wmask + PCI_PREF_BASE_UPPER32, 0xff, 8);
 
-    pci_set_word(d->wmask + PCI_BRIDGE_CONTROL, 0xffff);
+/* TODO: add this define to pci_regs.h in linux and then in qemu. */
+#define  PCI_BRIDGE_CTL_VGA_16BIT      0x10    /* VGA 16-bit decode */
+#define  PCI_BRIDGE_CTL_DISCARD                0x100   /* Primary discard timer */
+#define  PCI_BRIDGE_CTL_SEC_DISCARD    0x200   /* Secondary discard timer */
+#define  PCI_BRIDGE_CTL_DISCARD_STATUS 0x400   /* Discard timer status */
+#define  PCI_BRIDGE_CTL_DISCARD_SERR   0x800   /* Discard timer SERR# enable */
+    pci_set_word(d->wmask + PCI_BRIDGE_CONTROL,
+                 PCI_BRIDGE_CTL_PARITY |
+                 PCI_BRIDGE_CTL_SERR |
+                 PCI_BRIDGE_CTL_ISA |
+                 PCI_BRIDGE_CTL_VGA |
+                 PCI_BRIDGE_CTL_VGA_16BIT |
+                 PCI_BRIDGE_CTL_MASTER_ABORT |
+                 PCI_BRIDGE_CTL_BUS_RESET |
+                 PCI_BRIDGE_CTL_FAST_BACK |
+                 PCI_BRIDGE_CTL_DISCARD |
+                 PCI_BRIDGE_CTL_SEC_DISCARD |
+                 PCI_BRIDGE_CTL_DISCARD_STATUS |
+                 PCI_BRIDGE_CTL_DISCARD_SERR);
+    /* Below does not do anything as we never set this bit, put here for
+     * completeness. */
+    pci_set_word(d->w1cmask + PCI_BRIDGE_CONTROL,
+                 PCI_BRIDGE_CTL_DISCARD_STATUS);
 }
 
 static int pci_init_multifunction(PCIBus *bus, PCIDevice *dev)