KVM: arm64: selftests: Add write_dbg{b,w}{c,v}r helpers in debug-exceptions

Introduce helpers in the debug-exceptions test to write to
dbg{b,w}{c,v}r registers. Those helpers will be useful for
test cases that will be added to the test in subsequent patches.

No functional change intended.

Signed-off-by: Reiji Watanabe <reijiw@google.com>
Reviewed-by: Ricardo Koller <ricarkol@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20221020054202.2119018-3-reijiw@google.com

diff --git a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
index 3808d3d..d988490 100644 (file)
--- a/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
+++ b/tools/testing/selftests/kvm/aarch64/debug-exceptions.c
@@ -30,6 +30,69 @@ static volatile uint64_t svc_addr;
 static volatile uint64_t ss_addr[4], ss_idx;
 #define  PC(v)  ((uint64_t)&(v))
 
+#define GEN_DEBUG_WRITE_REG(reg_name)                  \
+static void write_##reg_name(int num, uint64_t val)    \
+{                                                      \
+       switch (num) {                                  \
+       case 0:                                         \
+               write_sysreg(val, reg_name##0_el1);     \
+               break;                                  \
+       case 1:                                         \
+               write_sysreg(val, reg_name##1_el1);     \
+               break;                                  \
+       case 2:                                         \
+               write_sysreg(val, reg_name##2_el1);     \
+               break;                                  \
+       case 3:                                         \
+               write_sysreg(val, reg_name##3_el1);     \
+               break;                                  \
+       case 4:                                         \
+               write_sysreg(val, reg_name##4_el1);     \
+               break;                                  \
+       case 5:                                         \
+               write_sysreg(val, reg_name##5_el1);     \
+               break;                                  \
+       case 6:                                         \
+               write_sysreg(val, reg_name##6_el1);     \
+               break;                                  \
+       case 7:                                         \
+               write_sysreg(val, reg_name##7_el1);     \
+               break;                                  \
+       case 8:                                         \
+               write_sysreg(val, reg_name##8_el1);     \
+               break;                                  \
+       case 9:                                         \
+               write_sysreg(val, reg_name##9_el1);     \
+               break;                                  \
+       case 10:                                        \
+               write_sysreg(val, reg_name##10_el1);    \
+               break;                                  \
+       case 11:                                        \
+               write_sysreg(val, reg_name##11_el1);    \
+               break;                                  \
+       case 12:                                        \
+               write_sysreg(val, reg_name##12_el1);    \
+               break;                                  \
+       case 13:                                        \
+               write_sysreg(val, reg_name##13_el1);    \
+               break;                                  \
+       case 14:                                        \
+               write_sysreg(val, reg_name##14_el1);    \
+               break;                                  \
+       case 15:                                        \
+               write_sysreg(val, reg_name##15_el1);    \
+               break;                                  \
+       default:                                        \
+               GUEST_ASSERT(0);                        \
+       }                                               \
+}
+
+/* Define write_dbgbcr()/write_dbgbvr()/write_dbgwcr()/write_dbgwvr() */
+GEN_DEBUG_WRITE_REG(dbgbcr)
+GEN_DEBUG_WRITE_REG(dbgbvr)
+GEN_DEBUG_WRITE_REG(dbgwcr)
+GEN_DEBUG_WRITE_REG(dbgwvr)
+
 static void reset_debug_state(void)
 {
        asm volatile("msr daifset, #8");
@@ -61,8 +124,9 @@ static void install_wp(uint64_t addr)
        uint32_t mdscr;
 
        wcr = DBGWCR_LEN8 | DBGWCR_RD | DBGWCR_WR | DBGWCR_EL1 | DBGWCR_E;
-       write_sysreg(wcr, dbgwcr0_el1);
-       write_sysreg(addr, dbgwvr0_el1);
+       write_dbgwcr(0, wcr);
+       write_dbgwvr(0, addr);
+
        isb();
 
        asm volatile("msr daifclr, #8");
@@ -78,8 +142,8 @@ static void install_hw_bp(uint64_t addr)
        uint32_t mdscr;
 
        bcr = DBGBCR_LEN8 | DBGBCR_EXEC | DBGBCR_EL1 | DBGBCR_E;
-       write_sysreg(bcr, dbgbcr0_el1);
-       write_sysreg(addr, dbgbvr0_el1);
+       write_dbgbcr(0, bcr);
+       write_dbgbvr(0, addr);
        isb();
 
        asm volatile("msr daifclr, #8");