bnxt_en: Store the maximum NQs available on the PF.

The PF has a pool of NQs and MSIX vectors assigned to it based on
NVRAM configurations.  The number of usable MSIX vectors on the PF
is the minimum of the NQs and MSIX vectors.  Any excess NQs without
associated MSIX may be used for the VFs, so we need to store this
max_nqs value.  max_nqs minus the NQs used by the PF will be the
available NQs for the VFs.

Signed-off-by: Michael Chan <michael.chan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.c b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
index 8a2e9cd..c65b5fe 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.c
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.c
@@ -6221,7 +6221,7 @@ int bnxt_hwrm_func_resc_qcaps(struct bnxt *bp, bool all)
        if (bp->flags & BNXT_FLAG_CHIP_P5) {
                u16 max_msix = le16_to_cpu(resp->max_msix);
 
-               hw_resc->max_irqs = min_t(u16, hw_resc->max_irqs, max_msix);
+               hw_resc->max_nqs = max_msix;
                hw_resc->max_hw_ring_grps = hw_resc->max_rx_rings;
        }
 
@@ -7059,6 +7059,9 @@ static unsigned int bnxt_get_max_func_irqs(struct bnxt *bp)
 {
        struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
 
+       if (bp->flags & BNXT_FLAG_CHIP_P5)
+               return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_nqs);
+
        return min_t(unsigned int, hw_resc->max_irqs, hw_resc->max_cp_rings);
 }
 

diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h
index 3030931..d45cbb4 100644 (file)
--- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h
+++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h
@@ -927,6 +927,7 @@ struct bnxt_hw_resc {
        u16     resv_vnics;
        u16     min_stat_ctxs;
        u16     max_stat_ctxs;
+       u16     max_nqs;
        u16     max_irqs;
        u16     resv_irqs;
 };