.endianness = DEVICE_LITTLE_ENDIAN,
};
+static void aspeed_smc_instance_init(Object *obj)
+{
+ AspeedSMCState *s = ASPEED_SMC(obj);
+ AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
+ int i;
+
+ for (i = 0; i < asc->max_peripherals; i++) {
+ object_initialize_child(obj, "flash[*]", &s->flashes[i],
+ TYPE_ASPEED_SMC_FLASH);
+ }
+}
+
/*
* Initialize the custom address spaces for DMAs
*/
AspeedSMCState *s = ASPEED_SMC(dev);
AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
int i;
- char name[32];
hwaddr offset = 0;
/* keep a copy under AspeedSMCState to speed up accesses */
&s->mmio_flash, 0, asc->flash_window_size);
sysbus_init_mmio(sbd, &s->mmio_flash_alias);
- s->flashes = g_new0(AspeedSMCFlash, asc->max_peripherals);
-
/*
* Let's create a sub memory region for each possible peripheral. All
* have a configurable memory segment in the overall flash mapping
for (i = 0; i < asc->max_peripherals; ++i) {
AspeedSMCFlash *fl = &s->flashes[i];
- snprintf(name, sizeof(name), TYPE_ASPEED_SMC ".flash.%d", i);
+ if (!object_property_set_link(OBJECT(fl), "controller", OBJECT(s),
+ errp)) {
+ return;
+ }
+ if (!object_property_set_uint(OBJECT(fl), "cs", i, errp)) {
+ return;
+ }
+ if (!sysbus_realize(SYS_BUS_DEVICE(fl), errp)) {
+ return;
+ }
- fl->cs = i;
- fl->controller = s;
- memory_region_init_io(&fl->mmio, OBJECT(s), &aspeed_smc_flash_ops,
- fl, name, asc->segments[i].size);
memory_region_add_subregion(&s->mmio_flash, offset, &fl->mmio);
offset += asc->segments[i].size;
}
static const TypeInfo aspeed_smc_info = {
.name = TYPE_ASPEED_SMC,
.parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_smc_instance_init,
.instance_size = sizeof(AspeedSMCState),
.class_size = sizeof(AspeedSMCClass),
.class_init = aspeed_smc_class_init,
.abstract = true,
};
+static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
+{
+ AspeedSMCFlash *s = ASPEED_SMC_FLASH(dev);
+ AspeedSMCClass *asc;
+ g_autofree char *name = g_strdup_printf(TYPE_ASPEED_SMC_FLASH ".%d", s->cs);
+
+ if (!s->controller) {
+ error_setg(errp, TYPE_ASPEED_SMC_FLASH ": 'controller' link not set");
+ return;
+ }
+
+ asc = ASPEED_SMC_GET_CLASS(s->controller);
+
+ /*
+ * Use the default segment value to size the memory region. This
+ * can be changed by FW at runtime.
+ */
+ memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_flash_ops,
+ s, name, asc->segments[s->cs].size);
+ sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
+}
+
+static Property aspeed_smc_flash_properties[] = {
+ DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
+ DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC,
+ AspeedSMCState *),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void aspeed_smc_flash_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->desc = "Aspeed SMC Flash device region";
+ dc->realize = aspeed_smc_flash_realize;
+ device_class_set_props(dc, aspeed_smc_flash_properties);
+}
+
+static const TypeInfo aspeed_smc_flash_info = {
+ .name = TYPE_ASPEED_SMC_FLASH,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSMCFlash),
+ .class_init = aspeed_smc_flash_class_init,
+};
/*
* The Segment Registers of the AST2400 and AST2500 have a 8MB
static void aspeed_smc_register_types(void)
{
+ type_register_static(&aspeed_smc_flash_info);
type_register_static(&aspeed_smc_info);
type_register_static(&aspeed_2400_smc_info);
type_register_static(&aspeed_2400_fmc_info);