pinctrl: npcm: Fix broken references to chip->parent_device

The npcm driver has a bunch of references to the irq_chip parent_device
field, but never sets it.

Fix it by fishing that reference from somewhere else, but it is
obvious that these debug statements were never used. Also remove
an unused field in a local data structure.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: Bartosz Golaszewski <brgl@bgdev.pl>
Link: https://lore.kernel.org/r/20220201120310.878267-11-maz@kernel.org

diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
index 4d81908..ba536fd 100644 (file)
--- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c
@@ -78,7 +78,6 @@ struct npcm7xx_gpio {
        struct gpio_chip        gc;
        int                     irqbase;
        int                     irq;
-       void                    *priv;
        struct irq_chip         irq_chip;
        u32                     pinctrl_id;
        int (*direction_input)(struct gpio_chip *chip, unsigned offset);
@@ -226,7 +225,7 @@ static void npcmgpio_irq_handler(struct irq_desc *desc)
        chained_irq_enter(chip, desc);
        sts = ioread32(bank->base + NPCM7XX_GP_N_EVST);
        en  = ioread32(bank->base + NPCM7XX_GP_N_EVEN);
-       dev_dbg(chip->parent_device, "==> got irq sts %.8x %.8x\n", sts,
+       dev_dbg(bank->gc.parent, "==> got irq sts %.8x %.8x\n", sts,
                en);
 
        sts &= en;
@@ -241,33 +240,33 @@ static int npcmgpio_set_irq_type(struct irq_data *d, unsigned int type)
                gpiochip_get_data(irq_data_get_irq_chip_data(d));
        unsigned int gpio = BIT(d->hwirq);
 
-       dev_dbg(d->chip->parent_device, "setirqtype: %u.%u = %u\n", gpio,
+       dev_dbg(bank->gc.parent, "setirqtype: %u.%u = %u\n", gpio,
                d->irq, type);
        switch (type) {
        case IRQ_TYPE_EDGE_RISING:
-               dev_dbg(d->chip->parent_device, "edge.rising\n");
+               dev_dbg(bank->gc.parent, "edge.rising\n");
                npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_EVBE, gpio);
                npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio);
                break;
        case IRQ_TYPE_EDGE_FALLING:
-               dev_dbg(d->chip->parent_device, "edge.falling\n");
+               dev_dbg(bank->gc.parent, "edge.falling\n");
                npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_EVBE, gpio);
                npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio);
                break;
        case IRQ_TYPE_EDGE_BOTH:
-               dev_dbg(d->chip->parent_device, "edge.both\n");
+               dev_dbg(bank->gc.parent, "edge.both\n");
                npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_EVBE, gpio);
                break;
        case IRQ_TYPE_LEVEL_LOW:
-               dev_dbg(d->chip->parent_device, "level.low\n");
+               dev_dbg(bank->gc.parent, "level.low\n");
                npcm_gpio_set(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio);
                break;
        case IRQ_TYPE_LEVEL_HIGH:
-               dev_dbg(d->chip->parent_device, "level.high\n");
+               dev_dbg(bank->gc.parent, "level.high\n");
                npcm_gpio_clr(&bank->gc, bank->base + NPCM7XX_GP_N_POL, gpio);
                break;
        default:
-               dev_dbg(d->chip->parent_device, "invalid irq type\n");
+               dev_dbg(bank->gc.parent, "invalid irq type\n");
                return -EINVAL;
        }
 
@@ -289,7 +288,7 @@ static void npcmgpio_irq_ack(struct irq_data *d)
                gpiochip_get_data(irq_data_get_irq_chip_data(d));
        unsigned int gpio = d->hwirq;
 
-       dev_dbg(d->chip->parent_device, "irq_ack: %u.%u\n", gpio, d->irq);
+       dev_dbg(bank->gc.parent, "irq_ack: %u.%u\n", gpio, d->irq);
        iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVST);
 }
 
@@ -301,7 +300,7 @@ static void npcmgpio_irq_mask(struct irq_data *d)
        unsigned int gpio = d->hwirq;
 
        /* Clear events */
-       dev_dbg(d->chip->parent_device, "irq_mask: %u.%u\n", gpio, d->irq);
+       dev_dbg(bank->gc.parent, "irq_mask: %u.%u\n", gpio, d->irq);
        iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVENC);
 }
 
@@ -313,7 +312,7 @@ static void npcmgpio_irq_unmask(struct irq_data *d)
        unsigned int gpio = d->hwirq;
 
        /* Enable events */
-       dev_dbg(d->chip->parent_device, "irq_unmask: %u.%u\n", gpio, d->irq);
+       dev_dbg(bank->gc.parent, "irq_unmask: %u.%u\n", gpio, d->irq);
        iowrite32(BIT(gpio), bank->base + NPCM7XX_GP_N_EVENS);
 }
 
@@ -323,7 +322,7 @@ static unsigned int npcmgpio_irq_startup(struct irq_data *d)
        unsigned int gpio = d->hwirq;
 
        /* active-high, input, clear interrupt, enable interrupt */
-       dev_dbg(d->chip->parent_device, "startup: %u.%u\n", gpio, d->irq);
+       dev_dbg(gc->parent, "startup: %u.%u\n", gpio, d->irq);
        npcmgpio_direction_input(gc, gpio);
        npcmgpio_irq_ack(d);
        npcmgpio_irq_unmask(d);