ARM: dts: at91: sama7g5: Add crypto nodes

Describe and enable the AES, SHA and TDES crypto IPs. Tested with the
extra run-time self tests of the registered crypto algorithms.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220208105646.226623-1-tudor.ambarus@microchip.com

diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index f6892ed..a95533a 100644 (file)
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -337,6 +337,27 @@
                        clock-names = "pclk", "gclk";
                };
 
+               aes: crypto@e1810000 {
+                       compatible = "atmel,at91sam9g46-aes";
+                       reg = <0xe1810000 0x100>;
+                       interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
+                       clock-names = "aes_clk";
+                       dmas = <&dma0 AT91_XDMAC_DT_PERID(1)>,
+                              <&dma0 AT91_XDMAC_DT_PERID(2)>;
+                       dma-names = "tx", "rx";
+               };
+
+               sha: crypto@e1814000 {
+                       compatible = "atmel,at91sam9g46-sha";
+                       reg = <0xe1814000 0x100>;
+                       interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 83>;
+                       clock-names = "sha_clk";
+                       dmas = <&dma0 AT91_XDMAC_DT_PERID(48)>;
+                       dma-names = "tx";
+               };
+
                flx0: flexcom@e1818000 {
                        compatible = "atmel,sama5d2-flexcom";
                        reg = <0xe1818000 0x200>;
@@ -419,6 +440,17 @@
                        status = "disabled";
                };
 
+               tdes: crypto@e2014000 {
+                       compatible = "atmel,at91sam9g46-tdes";
+                       reg = <0xe2014000 0x100>;
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&pmc PMC_TYPE_PERIPHERAL 96>;
+                       clock-names = "tdes_clk";
+                       dmas = <&dma0 AT91_XDMAC_DT_PERID(54)>,
+                              <&dma0 AT91_XDMAC_DT_PERID(53)>;
+                       dma-names = "tx", "rx";
+               };
+
                flx4: flexcom@e2018000 {
                        compatible = "atmel,sama5d2-flexcom";
                        reg = <0xe2018000 0x200>;