* linux-target.c (reginfo) [FRV_LINUX_TARGET]: Add support for

	registers fsr0, acc0-acc7, accg0-accg7, msr0, msr1, gner0, gner1,
	fner0, and fner1.

diff --git a/rda/unix/ChangeLog b/rda/unix/ChangeLog
index 0665561..666428a 100644 (file)
--- a/rda/unix/ChangeLog
+++ b/rda/unix/ChangeLog
@@ -1,3 +1,9 @@
+2004-04-05  Kevin Buettner  <kevinb@redhat.com>
+
+       * linux-target.c (reginfo) [FRV_LINUX_TARGET]: Add support for
+       registers fsr0, acc0-acc7, accg0-accg7, msr0, msr1, gner0, gner1,
+       fner0, and fner1.
+
 2004-03-19  Kevin Buettner  <kevinb@redhat.com>
 
        * ptrace-target.c (ptrace_exit_program): Cause main loop to exit.

diff --git a/rda/unix/linux-target.c b/rda/unix/linux-target.c
index c5d8e92..89d06f9 100644 (file)
--- a/rda/unix/linux-target.c
+++ b/rda/unix/linux-target.c
@@ -1062,7 +1062,30 @@ static struct peekuser_pokeuser_reginfo reginfo[] =
      32-bit halves. */
   { PT_IACC0H * 4,  4, GREGS, offsetof (struct user_int_regs, iacc[0]), 4, 4, 0 },
   { PT_IACC0L * 4,  4, GREGS, offsetof (struct user_int_regs, iacc[0]) + 4, 4, 4, 0 },
+  { PT_FSR(0) * 4,  4, fpreg_offset_and_size (fsr[0]), 4, 0 },
+  { PT_ACC(0) * 4,  4, fpreg_offset_and_size (acc[0]), 4, 0 },
+  { PT_ACC(1) * 4,  4, fpreg_offset_and_size (acc[1]), 4, 0 },
+  { PT_ACC(2) * 4,  4, fpreg_offset_and_size (acc[2]), 4, 0 },
+  { PT_ACC(3) * 4,  4, fpreg_offset_and_size (acc[3]), 4, 0 },
+  { PT_ACC(4) * 4,  4, fpreg_offset_and_size (acc[4]), 4, 0 },
+  { PT_ACC(5) * 4,  4, fpreg_offset_and_size (acc[5]), 4, 0 },
+  { PT_ACC(6) * 4,  4, fpreg_offset_and_size (acc[6]), 4, 0 },
+  { PT_ACC(7) * 4,  4, fpreg_offset_and_size (acc[7]), 4, 0 },
+
+  /* For the one-byte ACCG regs, ptrace() fetches four regs at a time,
+     but the user_fpmedia_regs struct breaks the regs out into an array
+     of bytes.  Thus, we can't use the fpreg_offset_and_size macro.  */
+  { PT_ACCG(0) * 4, 4, FPREGS, offsetof (struct user_fpmedia_regs, acc[0]), 4, 4, 0 },
+  { PT_ACCG(1) * 4, 4, FPREGS, offsetof (struct user_fpmedia_regs, acc[4]), 4, 4, 0 },
+
+  { PT_MSR(0) * 4,  4, fpreg_offset_and_size (msr[0]), 4, 0 },
+  { PT_MSR(1) * 4,  4, fpreg_offset_and_size (msr[0]), 4, 0 },
+  
+  { PT_GNER0 * 4,   4, greg_offset_and_size (gner[0]), 4, 0 },
+  { PT_GNER1 * 4,   4, greg_offset_and_size (gner[1]), 4, 0 },
 
+  { PT_FNER(0) * 4, 4, fpreg_offset_and_size (fner[0]), 4, 0 },
+  { PT_FNER(1) * 4, 4, fpreg_offset_and_size (fner[1]), 4, 0 },
 };
 
 int