Uncomment instructions that take both an immediate and a memory

operand but their sizes differ.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11969 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp
index b27602a..fda4fd7 100644 (file)
--- a/lib/Target/X86/PeepholeOptimizer.cpp
+++ b/lib/Target/X86/PeepholeOptimizer.cpp
@@ -156,10 +156,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
     }
     return false;
 
-// FIXME: The printer currently does not play well with instructions
-// that have immediates and memory operands with size mismatches so
-// the following are disabled.
-#if 0
   case X86::ADDmi16:  case X86::ADDmi32:
   case X86::SUBmi16:  case X86::SUBmi32:
   case X86::ANDmi16:  case X86::ANDmi32:
@@ -195,7 +191,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
       }
     }
     return false;
-#endif
 
 #if 0
   case X86::MOVri32: Size++;

diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp
index b27602a..fda4fd7 100644 (file)
--- a/lib/Target/X86/X86PeepholeOpt.cpp
+++ b/lib/Target/X86/X86PeepholeOpt.cpp
@@ -156,10 +156,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
     }
     return false;
 
-// FIXME: The printer currently does not play well with instructions
-// that have immediates and memory operands with size mismatches so
-// the following are disabled.
-#if 0
   case X86::ADDmi16:  case X86::ADDmi32:
   case X86::SUBmi16:  case X86::SUBmi32:
   case X86::ANDmi16:  case X86::ANDmi32:
@@ -195,7 +191,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
       }
     }
     return false;
-#endif
 
 #if 0
   case X86::MOVri32: Size++;

diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index a09f87a..e288f42 100644 (file)
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -207,25 +207,25 @@ bool X86RegisterInfo::foldMemoryOperand(MachineBasicBlock::iterator &MI,
     case X86::SHLrCL8: NI = MakeMInst( X86::SHLmCL8 ,FrameIndex, MI); break;
     case X86::SHLrCL16:NI = MakeMInst( X86::SHLmCL16,FrameIndex, MI); break;
     case X86::SHLrCL32:NI = MakeMInst( X86::SHLmCL32,FrameIndex, MI); break;
-//     case X86::SHLri8:  NI = MakeMIInst(X86::SHLmi8 , FrameIndex, MI); break;
-//     case X86::SHLri16: NI = MakeMIInst(X86::SHLmi16, FrameIndex, MI); break;
-//     case X86::SHLri32: NI = MakeMIInst(X86::SHLmi32, FrameIndex, MI); break;
+    case X86::SHLri8:  NI = MakeMIInst(X86::SHLmi8 , FrameIndex, MI); break;
+    case X86::SHLri16: NI = MakeMIInst(X86::SHLmi16, FrameIndex, MI); break;
+    case X86::SHLri32: NI = MakeMIInst(X86::SHLmi32, FrameIndex, MI); break;
     case X86::SHRrCL8: NI = MakeMInst( X86::SHRmCL8 ,FrameIndex, MI); break;
     case X86::SHRrCL16:NI = MakeMInst( X86::SHRmCL16,FrameIndex, MI); break;
     case X86::SHRrCL32:NI = MakeMInst( X86::SHRmCL32,FrameIndex, MI); break;
-//     case X86::SHRri8:  NI = MakeMIInst(X86::SHRmi8 , FrameIndex, MI); break;
-//     case X86::SHRri16: NI = MakeMIInst(X86::SHRmi16, FrameIndex, MI); break;
-//     case X86::SHRri32: NI = MakeMIInst(X86::SHRmi32, FrameIndex, MI); break;
+    case X86::SHRri8:  NI = MakeMIInst(X86::SHRmi8 , FrameIndex, MI); break;
+    case X86::SHRri16: NI = MakeMIInst(X86::SHRmi16, FrameIndex, MI); break;
+    case X86::SHRri32: NI = MakeMIInst(X86::SHRmi32, FrameIndex, MI); break;
     case X86::SARrCL8: NI = MakeMInst( X86::SARmCL8 ,FrameIndex, MI); break;
     case X86::SARrCL16:NI = MakeMInst( X86::SARmCL16,FrameIndex, MI); break;
     case X86::SARrCL32:NI = MakeMInst( X86::SARmCL32,FrameIndex, MI); break;
-//     case X86::SARri8:  NI = MakeMIInst(X86::SARmi8 , FrameIndex, MI); break;
-//     case X86::SARri16: NI = MakeMIInst(X86::SARmi16, FrameIndex, MI); break;
-//     case X86::SARri32: NI = MakeMIInst(X86::SARmi32, FrameIndex, MI); break;
+    case X86::SARri8:  NI = MakeMIInst(X86::SARmi8 , FrameIndex, MI); break;
+    case X86::SARri16: NI = MakeMIInst(X86::SARmi16, FrameIndex, MI); break;
+    case X86::SARri32: NI = MakeMIInst(X86::SARmi32, FrameIndex, MI); break;
     case X86::SHLDrrCL32:NI = MakeMRInst( X86::SHLDmrCL32,FrameIndex, MI);break;
-//     case X86::SHLDrri32: NI = MakeMRIInst(X86::SHLDmri32, FrameIndex, MI);break;
+    case X86::SHLDrri32: NI = MakeMRIInst(X86::SHLDmri32, FrameIndex, MI);break;
     case X86::SHRDrrCL32:NI = MakeMRInst( X86::SHRDmrCL32,FrameIndex, MI);break;
-//     case X86::SHRDrri32: NI = MakeMRIInst(X86::SHRDmri32, FrameIndex, MI);break;
+    case X86::SHRDrri32: NI = MakeMRIInst(X86::SHRDmri32, FrameIndex, MI);break;
     case X86::SETBr:   NI = MakeMInst( X86::SETBm,   FrameIndex, MI); break;
     case X86::SETAEr:  NI = MakeMInst( X86::SETAEm,  FrameIndex, MI); break;
     case X86::SETEr:   NI = MakeMInst( X86::SETEm,   FrameIndex, MI); break;