arm64/sysreg: Convert ID_DFR1_EL1 to automatic generation

Convert ID_DFR1_EL1 to be automatically generated as per DDI0487I.a,
no functional changes.

Reviewed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: James Morse <james.morse@arm.com>
Link: https://lore.kernel.org/r/20221130171637.718182-39-james.morse@arm.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index a20ab57..3350fcd 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -165,8 +165,6 @@
 #define SYS_MPIDR_EL1                  sys_reg(3, 0, 0, 0, 5)
 #define SYS_REVIDR_EL1                 sys_reg(3, 0, 0, 0, 6)
 
-#define SYS_ID_DFR1_EL1                        sys_reg(3, 0, 0, 3, 5)
-
 #define SYS_ACTLR_EL1                  sys_reg(3, 0, 1, 0, 1)
 #define SYS_RGSR_EL1                   sys_reg(3, 0, 1, 0, 5)
 #define SYS_GCR_EL1                    sys_reg(3, 0, 1, 0, 6)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 6ff68bc..bd5fceb 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -775,6 +775,19 @@ Enum       3:0     CSV3
 EndEnum
 EndSysreg
 
+Sysreg ID_DFR1_EL1     3       0       0       3       5
+Res0   63:8
+Enum   7:4     HPMN0
+       0b0000  NI
+       0b0001  IMP
+EndEnum
+Enum   3:0     MTPMU
+       0b0000  IMPDEF
+       0b0001  IMP
+       0b1111  NI
+EndEnum
+EndSysreg
+
 Sysreg ID_MMFR5_EL1    3       0       0       3       6
 Res0   63:8
 Enum   7:4     nTLBPA