[AArch64] Improve macro fusion test case

Improve a vector in the test case for the fusion of address generation and
loads or stores.  Otherwise, NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325839 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/AArch64/misched-fusion-addr.ll b/test/CodeGen/AArch64/misched-fusion-addr.ll
index 9dfe9d3..f851148 100644 (file)
--- a/test/CodeGen/AArch64/misched-fusion-addr.ll
+++ b/test/CodeGen/AArch64/misched-fusion-addr.ll
@@ -98,15 +98,17 @@ define void @ldst_float() {
 }
 
 define void @ldst_double() {
+  %valf = load volatile float, float* @var_float
+  %vale = fpext float %valf to double
   %vald = load volatile double, double* @var_double
-  %val = insertelement <2 x double> undef, double %vald, i32 0
-  %vald2 = insertelement <2 x double> %val, double %vald, i32 1
+  %vald1 = insertelement <2 x double> undef, double %vald, i32 0
+  %vald2 = insertelement <2 x double> %vald1, double %vale, i32 1
   store volatile <2 x double> %vald2, <2 x double>* @var_double2
   ret void
 
 ; CHECK-LABEL: ldst_double:
 ; CHECK: adrp [[RD:x[0-9]+]], var_double
-; CHECK-NEXT: add {{x[0-9]+}}, [[RD]], {{#?}}:lo12:var_double
+; CHECK-NEXT: ldr {{d[0-9]+}}, {{\[}}[[RD]], {{#?}}:lo12:var_double{{\]}}
 ; CHECK: adrp [[RQ:x[0-9]+]], var_double2
 ; CHECK-NEXT: str {{q[0-9]+}}, {{\[}}[[RQ]], {{#?}}:lo12:var_double2{{\]}}
 }