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arm64: dts: qcom: msm8996: Add SDHCI1
authorKonrad Dybcio <konrad.dybcio@somainline.org>
Sun, 28 Feb 2021 13:08:22 +0000 (14:08 +0100)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 26 May 2021 03:40:32 +0000 (22:40 -0500)
Add SDHCI1 device to allow for usage of (more often than not) eMMC.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210228130831.203765-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/msm8996.dtsi

index 455ee21..f59e18e 100644 (file)
                        status = "disabled";
                };
 
+               sdhc1: sdhci@7464900 {
+                       compatible = "qcom,sdhci-msm-v4";
+                       reg = <0x07464900 0x11c>, <0x07464000 0x800>;
+                       reg-names = "hc_mem", "core_mem";
+
+                       interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
+                                       <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "hc_irq", "pwr_irq";
+
+                       clock-names = "iface", "core", "xo";
+                       clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+                               <&gcc GCC_SDCC1_APPS_CLK>,
+                               <&xo_board>;
+
+                       pinctrl-names = "default", "sleep";
+                       pinctrl-0 = <&sdc1_state_on>;
+                       pinctrl-1 = <&sdc1_state_off>;
+
+                       bus-width = <8>;
+                       non-removable;
+                       status = "disabled";
+               };
+
                sdhc2: sdhci@74a4900 {
                         status = "disabled";
                         compatible = "qcom,sdhci-msm-v4";