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hum, writing on one machine, testing on another...
authorAndrew Lenharth <andrewl@lenharth.org>
Wed, 26 Jan 2005 02:53:56 +0000 (02:53 +0000)
committerAndrew Lenharth <andrewl@lenharth.org>
Wed, 26 Jan 2005 02:53:56 +0000 (02:53 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19844 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Alpha/AlphaISelPattern.cpp

index 5fa16d0..c5220bc 100644 (file)
@@ -665,10 +665,11 @@ unsigned ISel::SelectExpr(SDOperand N) {
     // the ops are expanded into special library calls with
     // special calling conventions
     switch(N.getOpcode()) {
-    case UREM: Opc = Alpha::REMQU; break;
-    case SREM: Opc = Alpha::REMQ; break;
-    case UDIV: Opc = Alpha::DIVQU; break;
-    case SDIV: Opc = Alpha::DIVQ; break;
+    case ISD::UREM: Opc = Alpha::REMQU; break;
+    case ISD::SREM: Opc = Alpha::REMQ; break;
+    case ISD::UDIV: Opc = Alpha::DIVQU; break;
+    case ISD::SDIV: Opc = Alpha::DIVQ; break;
+    };
     Tmp1 = SelectExpr(N.getOperand(0));
     Tmp2 = SelectExpr(N.getOperand(1));
     BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);