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net: stmmac: dwxgmac2: Only clear interrupts that are active
authorJose Abreu <jose.abreu@synopsys.com>
Wed, 9 Jan 2019 09:05:57 +0000 (10:05 +0100)
committerDavid S. Miller <davem@davemloft.net>
Fri, 11 Jan 2019 23:35:06 +0000 (15:35 -0800)
In DMA interrupt handler we were clearing all interrupts status, even
the ones that were not active. Fix this and only clear the active
interrupts.

Cc: Joao Pinto <jpinto@synopsys.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c

index 6c5092e..c5e2558 100644 (file)
@@ -263,6 +263,7 @@ static int dwxgmac2_dma_interrupt(void __iomem *ioaddr,
                                  struct stmmac_extra_stats *x, u32 chan)
 {
        u32 intr_status = readl(ioaddr + XGMAC_DMA_CH_STATUS(chan));
+       u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
        int ret = 0;
 
        /* ABNORMAL interrupts */
@@ -282,8 +283,7 @@ static int dwxgmac2_dma_interrupt(void __iomem *ioaddr,
                x->normal_irq_n++;
 
                if (likely(intr_status & XGMAC_RI)) {
-                       u32 value = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
-                       if (likely(value & XGMAC_RIE)) {
+                       if (likely(intr_en & XGMAC_RIE)) {
                                x->rx_normal_irq_n++;
                                ret |= handle_rx;
                        }
@@ -295,7 +295,7 @@ static int dwxgmac2_dma_interrupt(void __iomem *ioaddr,
        }
 
        /* Clear interrupts */
-       writel(~0x0, ioaddr + XGMAC_DMA_CH_STATUS(chan));
+       writel(intr_en & intr_status, ioaddr + XGMAC_DMA_CH_STATUS(chan));
 
        return ret;
 }