Merge branch 'master' into i915-unification

Conflicts:

	src/mesa/drivers/dri/i915tex/i830_texstate.c
	src/mesa/drivers/dri/i915tex/i915_texstate.c

diff --cc src/mesa/drivers/dri/i915tex/i830_texstate.c
index b25ec19,0d3f053..7613b9d
--- 1/src/mesa/drivers/dri/i915tex/i830_texstate.c
--- 2/src/mesa/drivers/dri/i915tex/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915tex/i830_texstate.c
@@@ -136,12 -136,34 +136,34 @@@ i830_update_tex_unit(struct intel_conte
      */
     firstImage = tObj->Image[0][intelObj->firstLevel];
  
-    dri_bo_reference(intelObj->mt->region->buffer);
-    i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
-    i830->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt, 0,
-                                                              intelObj->
-                                                              firstLevel);
- 
+    if (intelObj->imageOverride) {
+       i830->state.tex_buffer[unit] = NULL;
+       i830->state.tex_offset[unit] = intelObj->textureOffset;
+ 
+       switch (intelObj->depthOverride) {
+       case 32:
+        format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
+        break;
+       case 24:
+       default:
+        format = MAPSURF_32BIT | MT_32BIT_XRGB8888;
+        break;
+       case 16:
+        format = MAPSURF_16BIT | MT_16BIT_RGB565;
+        break;
+       }
+ 
+       pitch = intelObj->pitchOverride;
+    } else {
 -      i830->state.tex_buffer[unit] = driBOReference(intelObj->mt->region->
 -                                                  buffer);
++      dri_bo_reference(intelObj->mt->region->buffer);
++      i830->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+       i830->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt,
+                                                               0, intelObj->
+                                                               firstLevel);
+ 
+       format = translate_texture_format(firstImage->TexFormat->MesaFormat);
+       pitch = intelObj->mt->pitch * intelObj->mt->cpp;
+    }
  
     state[I830_TEXREG_TM0LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
                                 (LOAD_TEXTURE_MAP0 << unit) | 4);

diff --cc src/mesa/drivers/dri/i915tex/i915_texstate.c
index 31d1875,3d68187..09684e8
--- 1/src/mesa/drivers/dri/i915tex/i915_texstate.c
--- 2/src/mesa/drivers/dri/i915tex/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915tex/i915_texstate.c
@@@ -141,12 -141,34 +141,34 @@@ i915_update_tex_unit(struct intel_conte
      */
     firstImage = tObj->Image[0][intelObj->firstLevel];
  
-    dri_bo_reference(intelObj->mt->region->buffer);
-    i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
- 
-    i915->state.tex_offset[unit] = intel_miptree_image_offset(intelObj->mt, 0,
-                                                              intelObj->
-                                                              firstLevel);
+    if (intelObj->imageOverride) {
+       i915->state.tex_buffer[unit] = NULL;
+       i915->state.tex_offset[unit] = intelObj->textureOffset;
+ 
+       switch (intelObj->depthOverride) {
+       case 32:
+        format = MAPSURF_32BIT | MT_32BIT_ARGB8888;
+        break;
+       case 24:
+       default:
+        format = MAPSURF_32BIT | MT_32BIT_XRGB8888;
+        break;
+       case 16:
+        format = MAPSURF_16BIT | MT_16BIT_RGB565;
+        break;
+       }
+ 
+       pitch = intelObj->pitchOverride;
+    } else {
 -      i915->state.tex_buffer[unit] = driBOReference(intelObj->mt->region->
 -                                                  buffer);
++      dri_bo_reference(intelObj->mt->region->buffer);
++      i915->state.tex_buffer[unit] = intelObj->mt->region->buffer;
+       i915->state.tex_offset[unit] =  intel_miptree_image_offset(intelObj->mt,
+                                                                0, intelObj->
+                                                                firstLevel);
+ 
+       format = translate_texture_format(firstImage->TexFormat->MesaFormat);
+       pitch = intelObj->mt->pitch * intelObj->mt->cpp;
+    }
  
     state[I915_TEXREG_MS3] =
        (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |

diff --cc src/mesa/drivers/dri/i915tex/i915_vtbl.c
index 50571b7,f80e8d6..2a3ccd0
--- 1/src/mesa/drivers/dri/i915tex/i915_vtbl.c
--- 2/src/mesa/drivers/dri/i915tex/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915tex/i915_vtbl.c
@@@ -376,13 -378,16 +376,15 @@@ i915_emit_state(struct intel_context *i
              if (state->tex_buffer[i]) {
                 OUT_RELOC(state->tex_buffer[i],
                           DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
 -                         DRM_BO_MASK_MEM | DRM_BO_FLAG_READ,
                           state->tex_offset[i]);
              }
-             else {
+             else if (state == &i915->meta) {
                 assert(i == 0);
-                assert(state == &i915->meta);
                 OUT_BATCH(0);
              }
+             else {
+                OUT_BATCH(state->tex_offset[i]);
+             }
  
              OUT_BATCH(state->Tex[i][I915_TEXREG_MS3]);
              OUT_BATCH(state->Tex[i][I915_TEXREG_MS4]);

diff --cc src/mesa/drivers/dri/i915tex/intel_context.h
Simple merge

diff --cc src/mesa/drivers/dri/i915tex/intel_screen.c
Simple merge

diff --cc src/mesa/drivers/dri/i915tex/intel_tex_image.c
Simple merge