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arm64: cpufeature: Track 32bit EL0 support
authorSuzuki K Poulose <suzuki.poulose@arm.com>
Mon, 18 Apr 2016 09:28:36 +0000 (10:28 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 10 Oct 2018 06:52:09 +0000 (08:52 +0200)
commit 042446a31e3803d81c7e618dd80928dc3dce70c5 upstream.

Add cpu_hwcap bit for keeping track of the support for 32bit EL0.

Tested-by: Yury Norov <ynorov@caviumnetworks.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm64/include/asm/cpufeature.h
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/cpufeature.c

index 8884b5d..ad83c24 100644 (file)
@@ -31,8 +31,9 @@
 #define ARM64_WORKAROUND_CAVIUM_23154          6
 #define ARM64_WORKAROUND_834220                        7
 #define ARM64_WORKAROUND_CAVIUM_27456          8
+#define ARM64_HAS_32BIT_EL0                    9
 
-#define ARM64_NCAPS                            9
+#define ARM64_NCAPS                            10
 
 #ifndef __ASSEMBLY__
 
@@ -180,6 +181,11 @@ static inline bool cpu_supports_mixed_endian_el0(void)
        return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
 }
 
+static inline bool system_supports_32bit_el0(void)
+{
+       return cpus_have_cap(ARM64_HAS_32BIT_EL0);
+}
+
 static inline bool system_supports_mixed_endian_el0(void)
 {
        return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
index d48ab5b..5015032 100644 (file)
 #define ID_AA64PFR0_ASIMD_SUPPORTED    0x0
 #define ID_AA64PFR0_EL1_64BIT_ONLY     0x1
 #define ID_AA64PFR0_EL0_64BIT_ONLY     0x1
+#define ID_AA64PFR0_EL0_32BIT_64BIT    0x2
 
 /* id_aa64mmfr0 */
 #define ID_AA64MMFR0_TGRAN4_SHIFT      28
index 2735bf8..c1eddc0 100644 (file)
@@ -653,6 +653,14 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
                .min_field_value = 2,
        },
 #endif /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
+       {
+               .desc = "32-bit EL0 Support",
+               .capability = ARM64_HAS_32BIT_EL0,
+               .matches = has_cpuid_feature,
+               .sys_reg = SYS_ID_AA64PFR0_EL1,
+               .field_pos = ID_AA64PFR0_EL0_SHIFT,
+               .min_field_value = ID_AA64PFR0_EL0_32BIT_64BIT,
+       },
        {},
 };