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ARM: dts: sun8i-q8-common: Enable display pipeline with RGB LCD panel
authorChen-Yu Tsai <wens@csie.org>
Fri, 25 Jan 2019 03:23:13 +0000 (11:23 +0800)
committerMaxime Ripard <maxime.ripard@bootlin.com>
Fri, 25 Jan 2019 09:43:16 +0000 (10:43 +0100)
The Q8 design for A23/A33 tablets have an 18-bit RGB LCD panel connected
to the LCD interface on the SoC, the DC1SW output on the PMIC providing
power for the LCD, and PH7 toggling the reset pin for the panel.

This patch adds a device node for the panel, describing the above, and
enables the display pipeline.

The actual model or compatible string for the panel should be added in
the tablet device tree file.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
arch/arm/boot/dts/sun8i-q8-common.dtsi

index 719ad76..53104f4 100644 (file)
                ethernet0 = &sdio_wifi;
        };
 
+       panel: panel {
+               /* Tablet dts should provide panel compatible */
+               backlight = <&backlight>;
+               enable-gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+               power-supply = <&reg_dc1sw>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               port@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       panel_input: endpoint@0 {
+                               reg = <0>;
+                               remote-endpoint = <&tcon0_out_lcd>;
+                       };
+               };
+       };
+
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                /*
        };
 };
 
+&de {
+       status = "okay";
+};
+
 &ehci0 {
        status  = "okay";
 };
        };
 };
 
+&tcon0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&lcd_rgb666_pins>;
+       status = "okay";
+};
+
+&tcon0_out {
+       tcon0_out_lcd: endpoint@0 {
+               reg = <0>;
+               remote-endpoint = <&panel_input>;
+       };
+};
+
 &usbphy {
        usb1_vbus-supply = <&reg_dldo1>;
 };