return new AArch64_ELFTargetObjectFile();
}
-AArch64TargetLowering::AArch64TargetLowering(AArch64TargetMachine &TM)
+AArch64TargetLowering::AArch64TargetLowering(TargetMachine &TM)
: TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {
Subtarget = &TM.getSubtarget<AArch64Subtarget>();
bool RequireStrictAlign;
public:
- explicit AArch64TargetLowering(AArch64TargetMachine &TM);
+ explicit AArch64TargetLowering(TargetMachine &TM);
/// Selects the correct CCAssignFn for a the given CallingConvention
/// value.
AArch64Subtarget::AArch64Subtarget(const std::string &TT,
const std::string &CPU,
- const std::string &FS, bool LittleEndian)
+ const std::string &FS, TargetMachine &TM,
+ bool LittleEndian)
: AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
HasZeroCycleRegMove(false), HasZeroCycleZeroing(false), CPUString(CPU),
CPUString = "generic";
ParseSubtargetFeatures(CPUString, FS);
+ TLInfo = make_unique<AArch64TargetLowering>(TM);
}
/// ClassifyGlobalReference - Find the target operand flags that describe
#include "AArch64InstrInfo.h"
#include "AArch64FrameLowering.h"
+#include "AArch64ISelLowering.h"
#include "AArch64RegisterInfo.h"
#include "AArch64SelectionDAGInfo.h"
#include "llvm/IR/DataLayout.h"
AArch64FrameLowering FrameLowering;
AArch64InstrInfo InstrInfo;
AArch64SelectionDAGInfo TSInfo;
+ std::unique_ptr<AArch64TargetLowering> TLInfo;
public:
/// This constructor initializes the data members to match that
/// of the specified triple.
AArch64Subtarget(const std::string &TT, const std::string &CPU,
- const std::string &FS, bool LittleEndian);
+ const std::string &FS, TargetMachine &TM, bool LittleEndian);
const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
const AArch64FrameLowering *getFrameLowering() const {
return &FrameLowering;
}
+ const AArch64TargetLowering *getTargetLowering() const {
+ return TLInfo.get();
+ }
const AArch64InstrInfo *getInstrInfo() const { return &InstrInfo; }
const DataLayout *getDataLayout() const { return &DL; }
bool enableMachineScheduler() const override { return true; }
CodeGenOpt::Level OL,
bool LittleEndian)
: LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL),
- Subtarget(TT, CPU, FS, LittleEndian), TLInfo(*this) {
+ Subtarget(TT, CPU, FS, *this, LittleEndian) {
initAsmInfo();
}
protected:
AArch64Subtarget Subtarget;
-private:
- AArch64TargetLowering TLInfo;
-
public:
AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
StringRef FS, const TargetOptions &Options,
return &Subtarget;
}
const AArch64TargetLowering *getTargetLowering() const override {
- return &TLInfo;
+ return getSubtargetImpl()->getTargetLowering();
}
const DataLayout *getDataLayout() const override {
return getSubtargetImpl()->getDataLayout();