int cpu;
uint32_t *cells;
char *nodename;
- uint32_t plic_phandle;
+ char ethclk_names[] = "pclk\0hclk\0tx_clk";
+ uint32_t plic_phandle, ethclk_phandle;
fdt = s->fdt = create_device_tree(&s->fdt_size);
if (!fdt) {
g_free(cells);
g_free(nodename);
+ nodename = g_strdup_printf("/soc/ethclk");
+ qemu_fdt_add_subnode(fdt, nodename);
+ qemu_fdt_setprop_string(fdt, nodename, "compatible", "fixed-clock");
+ qemu_fdt_setprop_cell(fdt, nodename, "#clock-cells", 0x0);
+ qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency",
+ SIFIVE_U_GEM_CLOCK_FREQ);
+ qemu_fdt_setprop_cell(fdt, nodename, "phandle", 3);
+ qemu_fdt_setprop_cell(fdt, nodename, "linux,phandle", 3);
+ ethclk_phandle = qemu_fdt_get_phandle(fdt, nodename);
+ g_free(nodename);
+
nodename = g_strdup_printf("/soc/ethernet@%lx",
(long)memmap[SIFIVE_U_GEM].base);
qemu_fdt_add_subnode(fdt, nodename);
qemu_fdt_setprop_string(fdt, nodename, "phy-mode", "gmii");
qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", plic_phandle);
qemu_fdt_setprop_cells(fdt, nodename, "interrupts", SIFIVE_U_GEM_IRQ);
+ qemu_fdt_setprop_cells(fdt, nodename, "clocks",
+ ethclk_phandle, ethclk_phandle, ethclk_phandle);
+ qemu_fdt_setprop(fdt, nodename, "clocks-names", ethclk_names,
+ sizeof(ethclk_names));
qemu_fdt_setprop_cells(fdt, nodename, "#address-cells", 1);
qemu_fdt_setprop_cells(fdt, nodename, "#size-cells", 0);
g_free(nodename);