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Blackfin: bfin_ppi.h: start a common PPI/EPPI header
authorMike Frysinger <vapier@gentoo.org>
Fri, 22 Oct 2010 04:41:13 +0000 (04:41 +0000)
committerMike Frysinger <vapier@gentoo.org>
Fri, 22 Oct 2010 20:30:03 +0000 (16:30 -0400)
Start unifying the PPI/EPPI peripheral structures in one place.  This
may be used by camera/video/fpga/high speed devices.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
arch/blackfin/include/asm/bfin_ppi.h [new file with mode: 0644]

diff --git a/arch/blackfin/include/asm/bfin_ppi.h b/arch/blackfin/include/asm/bfin_ppi.h
new file mode 100644 (file)
index 0000000..0039008
--- /dev/null
@@ -0,0 +1,51 @@
+/*
+ * bfin_ppi.h - interface to Blackfin PPIs
+ *
+ * Copyright 2005-2010 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#ifndef __ASM_BFIN_PPI_H__
+#define __ASM_BFIN_PPI_H__
+
+#include <linux/types.h>
+
+/*
+ * All Blackfin system MMRs are padded to 32bits even if the register
+ * itself is only 16bits.  So use a helper macro to streamline this.
+ */
+#define __BFP(m) u16 m; u16 __pad_##m
+
+/*
+ * bfin ppi registers layout
+ */
+struct bfin_ppi_regs {
+       __BFP(control);
+       __BFP(status);
+       __BFP(count);
+       __BFP(delay);
+       __BFP(frame);
+};
+
+/*
+ * bfin eppi registers layout
+ */
+struct bfin_eppi_regs {
+       __BFP(status);
+       __BFP(hcount);
+       __BFP(hdelay);
+       __BFP(vcount);
+       __BFP(vdelay);
+       __BFP(frame);
+       __BFP(line);
+       __BFP(clkdiv);
+       u32 control;
+       u32 fs1w_hbl;
+       u32 fs1p_avpl;
+       u32 fs2w_lvb;
+       u32 fs2p_lavf;
+       u32 clip;
+};
+
+#endif