arm64: tegra: Add support to enumerate SD in UHS mode

Add support to enumerate SD in UHS mode on Tegra194. Add required
device-tree properties in SDMMC1 and SDMMC3 instances to enable dynamic
pad voltage switching and enumerate SD card in UHS-I modes.

Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 8d29b7f..3b42449 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -3,6 +3,7 @@
 #include <dt-bindings/gpio/tegra194-gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/mailbox/tegra186-hsp.h>
+#include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
 #include <dt-bindings/power/tegra194-powergate.h>
 #include <dt-bindings/reset/tegra194-reset.h>
@@ -893,6 +894,9 @@
                                        <&mc TEGRA194_MEMORY_CLIENT_SDMMCWA &emc>;
                        interconnect-names = "dma-mem", "write";
                        iommus = <&smmu TEGRA194_SID_SDMMC1>;
+                       pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+                       pinctrl-0 = <&sdmmc1_3v3>;
+                       pinctrl-1 = <&sdmmc1_1v8>;
                        nvidia,pad-autocal-pull-up-offset-3v3-timeout =
                                                                        <0x07>;
                        nvidia,pad-autocal-pull-down-offset-3v3-timeout =
@@ -904,6 +908,10 @@
                        nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
                        nvidia,default-tap = <0x9>;
                        nvidia,default-trim = <0x5>;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+                       sd-uhs-ddr50;
+                       sd-uhs-sdr104;
                        status = "disabled";
                };
 
@@ -920,6 +928,9 @@
                                        <&mc TEGRA194_MEMORY_CLIENT_SDMMCW &emc>;
                        interconnect-names = "dma-mem", "write";
                        iommus = <&smmu TEGRA194_SID_SDMMC3>;
+                       pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
+                       pinctrl-0 = <&sdmmc3_3v3>;
+                       pinctrl-1 = <&sdmmc3_1v8>;
                        nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
                        nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
                        nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
@@ -932,6 +943,10 @@
                        nvidia,pad-autocal-pull-down-offset-sdr104 = <0x00>;
                        nvidia,default-tap = <0x9>;
                        nvidia,default-trim = <0x5>;
+                       sd-uhs-sdr25;
+                       sd-uhs-sdr50;
+                       sd-uhs-ddr50;
+                       sd-uhs-sdr104;
                        status = "disabled";
                };
 
@@ -1472,6 +1487,25 @@
 
                        #interrupt-cells = <2>;
                        interrupt-controller;
+                       sdmmc1_3v3: sdmmc1-3v3 {
+                               pins = "sdmmc1-hv";
+                               power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+                       };
+
+                       sdmmc1_1v8: sdmmc1-1v8 {
+                               pins = "sdmmc1-hv";
+                               power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+                       };
+                       sdmmc3_3v3: sdmmc3-3v3 {
+                               pins = "sdmmc3-hv";
+                               power-source = <TEGRA_IO_PAD_VOLTAGE_3V3>;
+                       };
+
+                       sdmmc3_1v8: sdmmc3-1v8 {
+                               pins = "sdmmc3-hv";
+                               power-source = <TEGRA_IO_PAD_VOLTAGE_1V8>;
+                       };
+
                };
 
                smmu: iommu@12000000 {