return TargetInstrInfo::commuteInstructionImpl(WorkingMI, /*NewMI=*/false,
OpIdx1, OpIdx2);
}
+ case X86::CMPSDrr:
+ case X86::CMPSSrr:
case X86::CMPPDrri:
case X86::CMPPSrri:
+ case X86::VCMPSDrr:
+ case X86::VCMPSSrr:
case X86::VCMPPDrri:
case X86::VCMPPSrri:
case X86::VCMPPDYrri:
return false;
switch (MI.getOpcode()) {
+ case X86::CMPSDrr:
+ case X86::CMPSSrr:
case X86::CMPPDrri:
case X86::CMPPSrri:
+ case X86::VCMPSDrr:
+ case X86::VCMPSSrr:
case X86::VCMPPDrri:
case X86::VCMPPSrri:
case X86::VCMPPDYrri:
Operand CC, SDNode OpNode, ValueType VT,
PatFrag ld_frag, string asm, string asm_alt,
OpndItins itins, ImmLeaf immLeaf> {
+ let isCommutable = 1 in
def rr : SIi8<0xC2, MRMSrcReg,
(outs RC:$dst), (ins RC:$src1, RC:$src2, CC:$cc), asm,
[(set RC:$dst, (OpNode (VT RC:$src1), RC:$src2, immLeaf:$cc))],
define zeroext i1 @fcmp_oeq3(float %x) {
; SDAG-LABEL: fcmp_oeq3
; SDAG: xorps %xmm1, %xmm1
-; SDAG-NEXT: cmpeqss %xmm1, %xmm0
-; SDAG-NEXT: movd %xmm0, %eax
+; SDAG-NEXT: cmpeqss %xmm0, %xmm1
+; SDAG-NEXT: movd %xmm1, %eax
; SDAG-NEXT: andl $1, %eax
; FAST-LABEL: fcmp_oeq3
; FAST: xorps %xmm1, %xmm1
define zeroext i1 @fcmp_une3(float %x) {
; SDAG-LABEL: fcmp_une3
; SDAG: xorps %xmm1, %xmm1
-; SDAG-NEXT: cmpneqss %xmm1, %xmm0
-; SDAG-NEXT: movd %xmm0, %eax
+; SDAG-NEXT: cmpneqss %xmm0, %xmm1
+; SDAG-NEXT: movd %xmm1, %eax
; SDAG-NEXT: andl $1, %eax
; FAST-LABEL: fcmp_une3
; FAST: xorps %xmm1, %xmm1